Halldór Örn Ólafsson

Interfaces between 4H-SiC and SiO2: Microstructure, nanochemistry, and near-interface traps

We report on electrical and microscopic investigations aimed to clarify the origin of near-interface traps (NITs) in metal–silicon dioxide–4H-silicon carbide structures. Using capacitance–voltage and thermal dielectric relaxation current (TDRC) analysis we investigated NITs close to the 4H-SiC conduction-band edge in differently prepared thermal and deposited oxides and found that the traps give rise to two characteristic TDRC signatures belonging to two groups of trap levels. The total trapped charge exceeds 1×1013cm−2. The observed density and energy distribution of these traps are nearly identical in all thermal and deposited oxides investigated, suggesting that the NITs belong to intrinsic defects at the SiO2∕SiC interface which are readily formed during oxide deposition or thermal oxidation of 4H-SiC. Using high-resolution electron microscopy combined with nanochemical analysis (electron energy-loss near-edge spectroscopy and energy-filtered transmission electron microscopy) we investigated the SiO2∕...

A strong reduction in the density of near-interface traps at the SiO2∕4H‐SiC interface by sodium enhanced oxidation

This paper demonstrates how sodium enhanced oxidation of Si face 4H‐SiC results in removal of near-interface traps at the SiO2∕4H‐SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1–10cm2∕Vs) in Si face 4H‐SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these near-interface traps resulting in high inversion channel mobility of 150cm2∕Vs in such transistors. Sodium is incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during the formation of the SiC∕SiO2 interface.

High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material

We report investigations of Si face 4H-SiC MOSFETs with aluminum (Al) ion-implanted gate channels. High-quality SiO/sub 2/-SiC interfaces are obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion-implanted regions. A peak field-effect mobility of 170 cm/sup 2//V/spl middot/s is extracted from transistors with epitaxially grown channel region of doping 5/spl times/10/sup 15/ cm/sup -3/. Transistors with implanted gate channels with an Al concentration of 1/spl times/10/sup 17/ cm/sup -3/ exhibit peak field-effect mobility of 100 cm/sup 2//V/spl middot/s, while the mobility is 51 cm/sup 2//V/spl middot/s for an Al concentration of 5/spl times/10/sup 17/ cm/sup -3/. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.

Thermal emission of electrons from selected s-shell configurations in InAs/GaAs quantum dots

The thermal emission of electrons from self-assembled InAs/GaAs quantum dots, prepared by molecular-beam epitaxy, with an average base/height size of 20 nm/11 nm in Schottky diodes has been investigated using deep level transient spectroscopy (DLTS). By applying an appropriate set of voltage pulses across the Schottky diode, the two different s-electron configurations have been investigated separately. This avoids the problem of interference between overlapping peaks in DLTS data. We find that a difference in activation energy for the thermal electron emission between the two configurations agrees with expected variation in electron energy levels due to the size distribution of the quantum dots.

Observation of interface defects in thermally oxidized SiC using positron annihilation

Positron annihilation has been applied to study thermally oxidized 4H- and 6H-SiC. The SiC/SiO2 interface is found to contain a high density of open-volume defects. The positron trapping at the interface defects correlates with the charge of the interface determined by capacitance–voltage experiments. For oxides grown on n-SiC substrates, the positron annihilation characteristics at these defects are nearly indistinguishable from those of a silicon/oxide interface, with no discernable contribution from C-related bonds or carbon clusters. These results indicate that those defects at the SiC/oxide interface, which are visible to positrons, are similar to those at the Si/oxide interface. The positron annihilation characteristics suggest that these defects are vacancies surrounded by oxygen atoms.

Comparison between oxidation processes used to obtain the high inversion channel mobility in 4H-SiC MOSFETs

In this work two oxidation methods aimed at improving the silicon face 4H-SiC/SiO2 interface are compared. One is an oxidation in N2O performed in a quartz tube using quartz sample holders and the other is a dry oxidation performed in an alumina tube using alumina sample holders. In n-type metal oxide semiconductor (MOS) capacitors the interface state density near the SiC conduction band edge is estimated using capacitance–voltage (C–V) and thermal dielectric relaxation current (TDRC) measurements. N-channel metal oxide semiconductor field effect transistors (MOSFETs) are characterized by current–voltage (I–V) techniques and the inversion channel mobility is extracted. It is shown that the high inversion channel mobility (154 cm2 V−1 s−1) seen in samples oxidized using alumina correlates with a low interface trap density (3.6 × 1011 cm−2). In the case of N2O oxidation the mobility is lower (24 cm2 V−1 s−1) and the interface trap density is higher (1.6 × 1012 cm−2). Room temperature C–V measurements are of limited use when studying traps near the conduction band edge in MOS structures while the TDRC measurement technique gives a better estimate of their density.

Enhancement of Inversion Channel Mobility in 4H-SiC MOSFETs using a Gate Oxide Grown in Nitrous Oxide (N2O)

We report on processing and characterization of lateral n-channel 4H-SiC MOSFETs. We find that growing the gate oxide in N2O ambient results in a significant enhancement of the electron inversion channel mobility. Depending on the processing conditions the peak field effect mobility varies between 30 and 150 cm/Vs in these normally off devices while transistors with a conventional wet or dry gate oxide exhibit mobilities below 10 cm/Vs. The mobility enhancement is correlated with a significant reduction of the density of shallow interface states with energies close to the SiC conduction band edge. This is revealed from capacitance-voltage (C-V) data and thermally stimulated current measurements (TSC) on n-type reference capacitors.

Sodium Enhanced Oxidation of Si-Face 4H-SiC: A Method to Remove Near Interface Traps

We demonstrate how sodium enhanced oxidation of Si face 4H-SiC results in removal of near-interface traps at the SiO2/4H-SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1-10 cm2/Vs) in Si face 4H-SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these nearinterface traps resulting in high inversion channel mobility of 150 cm2/Vs in such transistors. Sodium can be incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during formation of the SiC/SiO2 interface.

High channel mobility 4H-SiC MOSFETs

We report investigations of MOS and MOSFET devices using a gate oxide grown in the presence of sintered alumina. In contrast to conventionally grown dry or wet oxides these oxides contain orders of magnitude lower density of near-interface traps at the SiO2/SiC interface. The reduction of interface traps is correlated with enhanced oxidation rate. The absence of near-interface traps makes possible fabrication of Si face 4H-SiC MOSFETs with peak field effect mobility of about 150 cm2/Vs. A clear correlation is observed between the field effect mobility in n-channel MOSFETs and the density of interface states near the SiC conduction band edge in n-type MOS capacitors. Stable operation of such normally-off 4H-SiC MOSFET transistors is observed from room temperature up to 150°C with positive threshold voltage shift less than 1 V. A small decrease in current with temperature up to 150°C is related to a decrease in the field effect mobility due to phonon scattering. However, the gate oxides contain sodium, which originates from the sintered alumina, resulting in severe device instabilities during negative gate bias stressing.

High-power-density 4H-SiC RF MOSFETs

The authors have made the first 4H-SiC RF power MOSFETs with cutoff frequency up to 12 GHz, delivering RF power of 1.9 W/mm at 3 GHz. The transistors withstand 200 V drain voltage, are normally off, and show no gate lag, which is often encountered in SiC MESFETs. The measured devices have a single drain finger and a double gate finger, and a total gate width of 0.8 mm. To their knowledge, this is the first time that power densities above 1 W/mm at 3 GHz are reported for SiC MOSFETs.