Ennis T. Ogawa

Electromigration reliability issues in dual-damascene Cu interconnections

Electromigration studies on Cu interconnects are reviewed. Some history and more recent results are discussed along with a description of the present interpretations of the active mass transport mechanisms involved in Cu electromigration. The issue of the dual-damascene process and its potential effect on EM reliability is described with special focus on the peculiarities of the dual-damascene interconnect architecture compared to more conventional subtractively etched Al-based interconnects. Experiments performed on dual-damascene interconnects that highlight electromigration reliability issues such as early failure, a tentative explanation for via electromigration failure, and the Blech effect, are summarized. Emphasis is placed on an experimental methodology that uses large interconnect ensembles in a multi-link configuration. Such a large scale study of nearly 10000 interconnects has shown statistical evidence of bimodal failure behavior consistent with the presence of a weak and strong failure mode, which have been identified as voiding, respectively, within the via and the trench at the cathode end of an interconnect. A multi-link approach has also demonstrated a length-dependent distribution of failures that yields a (j/spl middot/L)/sub c/ product value of about 9000 A/cm in dual-damascene Cu/oxide interconnections and is consistent with mass transport that is controlled by the presence of extended defects within Cu such as grain boundaries, interfaces, and/or surfaces. The study of dual-damascene Cu has demonstrated the importance of statistics in analyzing EM reliability.

Stress-induced voiding under vias connected to wide Cu metal leads

Stress-induced voiding is observed in Cu-based, deep-submicron, dual-damascene technologies where voids are formed under the via when the via connects to a wide metal lead below it. The voiding results from the supersaturation of vacancies that develops due to grain growth when the Cu is not properly annealed prior to being fully constrained. The driving force for voiding is shown to be stress migration with a maximum in voiding rate observed at /spl sim/190/spl deg/C. A diffusional model is presented which shows that the voiding mechanism is an issue primarily for vias connected to wide Cu leads. A thermomechanical stress exponent of 3.2 and a diffusional activation energy of 0.74 eV were determined for this stress-induced voiding mechanism.

Leakage, breakdown, and TDDB characteristics of porous low-k silica-based interconnect dielectrics

The reliability physics of low-k interconnect dielectrics is of great interest. Leakage, breakdown and TDDB data are presented for fluorinated silica, porous carbon-doped silica, and very porous carbon-doped silica. The breakdown and TDDB performance of the dielectrics are observed to degrade with the degree of porosity but the failure kinetics (field acceleration parameter and activation energy) seem to rather insensitive to porosity. A percolation model has been developed whereby the pores are treated as defects. The percolation model seems to describe well the observed breakdown and TDDB behavior.

Electromigration critical length effect in Cu/oxide dual-damascene interconnects

Electromigration tests at temperatures between 340 and 400 °C and current densities between 1.0 and 3.0 MA/cm2 have been performed to determine the temperature dependence of the critical length effect in 0.5-μm-wide Cu/oxide dual-damascene interconnects with 0.1 μm silicon nitride (SiNx) passivation. A focused-ion-beam-induced contrast imaging technique is used to locate failure sites of critical length test structures. Statistical analysis [E. T. Ogawa et al., Appl. Phys. Lett. 78, 18 (2001)] yields a threshold-length product (jL)c, of 3700 A/cm, and a temperature dependence is not observed within the temperature range 340–400 °C.

Direct observation of a critical length effect in dual-damascene Cu/oxide interconnects

Electromigration results have provided clear evidence of a short or “Blech” length effect in dual- damascene, Cu/oxide, multilinked interconnects. The test structure incorporates a repeated chain of Blech-type line elements and is amenable to failure analysis tools such as focused ion beam imaging. This large interconnect ensemble provides a statistical representation of electromigrationinduced damage in the regime where steady-state interconnect stress is manifest. Statistical analysis yields a critical length of 90 μm for interconnects with line width 0.5 μm at j=1.0×106 A/cm2 and T=325 °C.

Thermomechanical properties and moisture uptake characteristics of hydrogen silsesquioxane submicron films

This letter describes measurement of the biaxial modulus, coefficient of thermal expansion (CTE), and moisture uptake characteristics of hydrogen silsesquioxane (HSQ) thin films. The biaxial modulus and CTE were determined using a bending beam method, and moisture uptake was studied using a quartz crystal microbalance method. The biaxial modulus and CTE of a 0.5 μm HSQ film were measured on Si and Ge substrates and found to be 7.07 GPa and 20.5 ppm/°C, respectively. The value determined for the diffusion constant of water in a 0.7-μm-thick HSQ films is 3.61×10−10 cm2/s at room temperature.

Reliability analysis method for low-k interconnect dielectrics breakdown in integrated circuits

The shrinking line-to-line spacing in interconnect systems for advanced integrated circuit technology and the use of lower dielectric constant materials create the need for tools to evaluate the interconnect dielectric reliability. A multi-temperature, dual-ramp-rate voltage-ramp-to-breakdown methodology is presented and used here to extract important dielectric-breakdown parameters accurately for minimum-spaced metal lines. It is demonstrated that correction for the true minimum line-to-line spacing distributions become critically important and that the minimum spacing can be extracted electrically and compares favorably to electron microscopy cross sections. The spacing-corrected breakdown field distributions, at various temperatures, for the organosilicate material tested, indicated a very low apparent zero-field activation energy (0.14±0.02eV) and an apparent field-acceleration parameter γ=4.1±0.3cm∕MV that has little or no temperature dependence. Constant-voltage time-dependent-dielectric-breakdown m...

Time Dependent Dielectric Breakdown Characteristics of Low-k Dielectric (SiOC) Over a Wide Range of Test Areas and Electric Fields

Time-dependent dielectric breakdown (TDDB) of low-k dielectrics is reported for fully integrated carbon-doped silica dielectric (SiOC, keff=2.9) at wafer level over a wide range of area and electric-field test conditions at 105degC. In addition, long-term package level TDDB data were taken at 105degC for over 2 years on integrated comb-serpent test structures. The field acceleration parameter (gamma=4.5 plusmn 0.5 cm/MV) was found to be approximately independent of area (over 4 decades of area) and over a wide range of field (1.5-6.0 MV/cm), respectively. TDDB data, taken over long periods, agree well with predictions based on more rapid wafer-level TDDB testing. The low-k TDDB data suggest that, while the time-to-failure is a strong function of area and field, the time-to-failure physics does not vary greatly for fully integrated SiOC films as both the area and field are scaled. Furthermore, the fact that gamma is approximately constant (independent of area and applied E-field) indicates that silica-based low-k dielectric TDDB follows closely a thermochemical E-model for all areas and fields examined.

Statistics of electromigration early failures in Cu/oxide dual-damascene interconnects

Electromigration (EM) study at temperatures from 325-400/spl deg/C and current densities from 1-2 MA/cm/sup 2/ has determined the failure time characteristics and failure behavior of submicron dual-damascene Cu/oxide interconnects. The test structures used are based on statistical concepts potentially suitable to address the early failure issue in sub-/spl mu/m interconnects and are designed to examine failures occurring only in dual-damascene interconnects. A combination of single and repeated (N=1, 10, 50, and 100) serial chains of nominally identical interconnects are used in conjunction with statistical analysis based on weakest-link concepts (Nelson, 1990) to identify differences in the failure distribution as larger collections of interconnect elements are sampled. In total, nearly 10,000 interconnects were tested using this configuration. Through the use of these multiply-linked interconnect ensembles, statistical evidence of two distinct (weak and strong) failure modes in dual-damascene Cu/oxide interconnects is first reported. The bimodal failures have also been identified with distinct void formation mechanisms that appear characteristic of the dual-damascene interconnect architecture. The weak mode is found to be void formation within the dual-damascene via, while the strong mode is associated with voiding in the dual-damascene trench. The weak mode activation energy is found to be about 1 eV and seems consistent with void formation controlled by interface diffusion between Cu metal and Ta diffusion barrier. These observations using this type of testing methodology confirm the utility of the multi-link approach in electromigration reliability analysis and the detection of early failures.

Interface reliability assessments for copper/low-k products

Multiple new materials are being adopted by the semiconductor industry at a rapid rate for both semiconductor devices and packages. These advances are driving significant investigation into the impact of these materials on device and package reliability. Active investigation is focused on the impact of back-end-of-line (BEOL) processing on Cu/low-k reliability. This paper discusses Cu/low-k BEOL interfacial reliability issues and relates key items from the assembly process and packaging viewpoint that should be managed in order to prevent adverse assembly impact on BEOL interfacial reliability. Reliability failure mechanisms discussed include interface diffusion-controlled events such as the well-known example of Cu electromigration (EM), as well as stress-migration voiding. Interface defectivity impact on dielectric breakdown and leakage is discussed. Lastly, assessments of assembly impact on these Cu/low-k interfacial concerns are highlighted.