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Dive into the research topics where Finbarr Waldron is active.

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Featured researches published by Finbarr Waldron.


Journal of Micromechanics and Microengineering | 2013

Influence of aluminum nitride crystal orientation on MEMS energy harvesting device performance

Nathan Jackson; Rosemary O’Keeffe; Finbarr Waldron; Mike O’Neill; Alan Mathewson

Aluminum nitride (AlN) is a widely researched piezoelectric material due to its CMOS compatibility. One of the most common applications for AlN is in the area of vibrational energy harvesting. The piezoelectric quality of AlN is related to the crystal orientation of the film and optimal conditions are obtained when AlN is c-axis aligned with a (0 0 2) orientation. AlN can be a challenging material to integrate into a fabrication process due to orientation dependency of the fabrication process. This paper reports on the effects of non-(0 0 2) oriented AlN peaks on an energy harvesting MEMS cantilever structure. Results show that FWHM values of the AlN films from different wafers were approximately the same 8.5°, 8.7°, and 9°, however wafer 1 had additional peaks at (1 0 2) and (1 0 3), which significantly affected the piezoelectric constants and the amount of power generated. The measured d31 value for the wafers were 2.04, 1.97, and 0.84 pm V−1, and the power generated was 0.67, 0.64, and 0.24 µW respectively. These values show that non-peaks of AlN can cause a significant decrease in the piezoelectric constant, which causes significant decrease in the ability to generate power from an AlN film.


IEEE Transactions on Power Electronics | 2013

Technology Roadmapping for Power Supply in Package (PSiP) and Power Supply on Chip (PwrSoC)

Finbarr Waldron; Raymond Foley; John Slowey; Arnold Alderman; Brian Narveson; S.C.O. Mathuna

This paper presents a review and summary of the PSMA “PSiP2PwrSoC” special project that investigated the technology and performance underpinning recent commercial developments in Power Supply in Package and Power Supply on Chip. The results of this study are based on the identification of more than 28 commercial products, six of which were analyzed in detail, both physically and electrically. The methodology of the project is described and some of the salient results of this benchmarking effort are presented. In this study, a representative subset of the available commercial products was selected and a comprehensive physical, electrical and thermal performance analysis was carried out. The objectives were to identify the components, materials and assembly technologies used, and to determine if the drive toward greater integration and higher power density affected the performance of newer devices. The results of the analysis were then used to determine the current state of the technology in this application space, to show how it has developed to date and to predict how it might progress in the future. These results are presented in a generic format that does not identify individual products. This project was co-sponsored by the PSMA and member companies. The final report of the project, which includes more detailed information on the reviews described here as well as considerable trending analysis, is now available.


ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference | 2005

Determination of the Anand Viscoplasticity Model Constants for SnAgCu

Bryan Rodgers; Ben Flood; Jeff Punch; Finbarr Waldron

The major focus of this work was the determination of the nine constants required for Anand’s viscoplastic constitutive model for a lead-free solder alloy, 95.5Sn3.8Ag0.7Cu and to compare them with those for SnPb. The test specimen was a cast dog bone shape based on ASTM E 8M-01, with a diameter of 4mm and a gauge length of 20mm. A series of tensile experiments were carried out: constant displacement tests ranging from 6.5 × 10−5 /s to 1.0 × 10−3 /s at temperatures of 20°C, 75°C, and 125°C; constant load tests at a range of loads from 10MPa to 65MPa, also at temperatures of 20°C, 75°C, and 125°C. A series of non-linear fitting processes was used to determine the model constants. Comparisons were then made with experimental measurements of the stress-plastic strain curves from constant displacement rate tests: it was found that the model matched the experimental data at low strain rates but did not capture the strain hardening effect, especially at high strain rates. A finite element model of the test was also constructed using ANSYS software. This software includes the Anand model as an option for its range of viscoplastic elements, requiring that the nine constants be input. In this case, an 8-noded axisymmetric element (VISCO108) was used to model the test specimen under constant displacement rate loading. The model was then used to predict the stress-plastic strain curve and this was compared to both the experimental measurements and the fitted Anand model. Reasonable agreement was found between the Anand model and the FE predictions at small strain rates. Finally, a BGA device was simulated under accelerated temperature cycling conditions using ANSYS with the fitted Anand for the SnAgCu solder joints. A Morrow-type fatigue life model was applied using empirical constants from two published sources and good agreement was found between experiment and predicted fatigue life.Copyright


IEEE Transactions on Components and Packaging Technologies | 2004

Sources of variation in piezoresistive stress sensor measurements

Orla Slattery; Denis O'Mahoney; Eoin Sheehan; Finbarr Waldron

Piezoresistive stress sensors are widely used to characterize semiconductor die stresses. Packaging stresses induce a small change in resistance in the sensors and they are highly sensitive to factors such as temperature and processing conditions. Thus, accurate stress prediction requires calibration and knowledge of all sources of variation in the resistance response of the sensors. This paper quantifies the effect of process variations and demonstrates that die level tracability is critical to ensure accurate stress prediction.


applied power electronics conference | 2010

Technology roadmapping for Power Supply in Package (PSiP) and Power Supply on Chip (PwrSoC)

Raymond Foley; Finbarr Waldron; John Slowey; Arnold Alderman; Brian Narveson; S.C. O'Mathuna

This paper presents a review and summary of the PSMA ¿PSiP2PwrSoC¿ Special Project that investigated the technology and performance underpinning recent commercial developments in Power Supply in Package and Power Supply on Chip. The results of the study are based on the identification of more than 28 commercial products, 6 of which were analyzed in detail, both physically and electrically. The methodology of the project is described and some of the salient results of this benchmarking effort are presented. In this work, a representative subset of the available commercial products was selected and a comprehensive physical, electrical and thermal performance analysis was carried out. The main aims of this analysis were to identify the components, materials and assembly technologies used, and to determine if the drive towards greater integration and higher power density affected the performance of newer devices. The results of the analysis were then used to determine the current state of the technology in this application space, to show how it has developed to date and to predict how it might progress in the future. These results are presented in a generic format that does not identify individual products. This project was co-sponsored by the PSMA and member companies. The final report of the project, which includes more detailed information on the reviews described here as well as considerable trending analysis, is now available.


electronic components and technology conference | 1995

Performance and reliability of a three-dimensional plastic moulded vertical multichip module (MCM-V)

J. Barrett; C. Cahill; T. Compagno; M.O. Flaherty; T. Hayes; W. Lawton; J.O. Donavan; Cian O’Mathuna; G. McCarthy; O. Slattery; Finbarr Waldron; A.C. Vera; M. Masgrangeas; P. Pipard; C. Val; I. Serthelon

The performance and reliability of a low-cost three-dimensional plastic moulded vertical multi-chip module concept is presented. Performance was evaluated using custom designed chips incorporating thermal, thermomechanical, electrical and reliability test structures. Results of performance are presented and are shown to correlate well with thermal, thermomechanical and electrical simulations. The thermal and thermomechanical performances are sufficient to allow use of the MCM-V technique in a wide range of applications without the need for special cooling techniques. Reliability testing to space level standards was carried out on 53 technology demonstrator modules incorporating the test chips and a high level of reliability has been demonstrated.


international conference on microelectronic test structures | 2012

A diaphragm based piezoelectric AlN film quality test structure

Nathan Jackson; Rosemary O'Keeffe; Robert O'Leary; M. O'Neill; Finbarr Waldron; Alan Mathewson

Aluminum nitride (AlN) is becoming a commonly used piezoelectric material for various applications due to its compatibility with CMOS processing. However, the piezoelectric properties of AlN are highly dependent on the deposition process and the underlying layers, and typically require several test structures in order to determine the quality of the film. This paper highlights a MEMS based diaphragm test structure which allows various types of material characterization to be tested, in order to determine the quality of the AlN film on a bulk micromachined device wafer.


electronics system integration technology conference | 2010

Integrated magnetics on silicon for power supply in package (PSiP) and power supply on chip (PwrSoC)

Ningning Wang; Jason Hannon; Ray Foley; Kevin G. McCarthy; Terence O'Donnell; Kenneth Rodgers; Finbarr Waldron; Cian O’Mathuna

The paper introduces the context for the emerging area of integrated power conversion. The key applications driving this trend are outlined and the principal competing technologies are presented encompassing system in package, system on chip and embedded substrate solutions. A system-in-package, 30MHz dc-dc converter using a stacked co-packaging approach is demonstrated. Its enabling key elements, including magnetics on Si technology, a power IC with a digital pulse width modulator and on-chip capacitor, and associated packaging techniques are also presented. A maximum measured efficiency of 71.7% is achieved on the stacked converter with a 30% area reduction compared to side-by-side implementation.


IEEE Transactions on Components and Packaging Technologies | 2009

Fabrication and Characterization of a Low-Cost, Wafer-Scale Radial Microchannel Cooling Plate

Marc Phillipe Yves Desmulliez; A.J. Pang; M. Leonard; Resham Dhariwal; W. Yu; Eitan Abraham; Gy. Bognár; András Poppe; Gy. Horváth; Zs. Kohari; Marta Rencz; D.R. Emerson; R.W. Barber; Orla Slattery; Finbarr Waldron; N. Cordero

The modeling, simulation, fabrication, and testing of a microchannel cooling plate for microelectronic packaging applications are described in this paper. The cooling component uses forced convection of gas injected inside 128 microchannels of 100-mu m width and 70-mu m height. The nickel-based plate is fabricated on a glass substrate using a two-layer electroforming process using UV-LIGA technology. The thermal behavior of the microchannel cooling device is investigated by using the measurement of partial thermal resistances through the use of the structure functions method. Heat transfer coefficient values of 300 W/m2 K have been measured for a nitrogen flow rate of 120 l/h.


electronics packaging technology conference | 2004

Design, manufacture and testing of a low-cost micro-channel cooling device

A.J. Pang; Marc Phillipe Yves Desmulliez; M. Leonard; Resham Dhariwal; R.L. Reuben; Andrew S. Holmes; Guodong Hong; Keith Robert Pullen; Finbarr Waldron; Orla Slattery; Marta Rencz; D.R. Emerson; R.W. Barber

The modelling, simulation, fabrication and testing of a microchannel cooling plate are described in this article. The device is to be used in microelectronic packaging cooling applications. The nickel-based micro-channel cooling plate is fabricated on a glass substrate using a two-layer electroforming process borrowed from the UV-LIGA (UV-lithography, electroforming, replication) process. Forced convection of air or liquid is scheduled for this microchannel plate. The cooling plate has been tested using a custom-made rig to measure the flow pressure head as a function of mass flow rate. Hydraulic performance of the cooling plate is presented

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Alan Mathewson

Tyndall National Institute

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Nathan Jackson

Tyndall National Institute

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Cian O’Mathuna

Tyndall National Institute

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James F. Rohan

Tyndall National Institute

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Kenneth Rodgers

Tyndall National Institute

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