Fj Clough

The role of the gate insulator in the defect pool model for hydrogenated amorphous silicon thin film transistor characteristics

We demonstrate that differing transistor characteristics in the most important material systems can be explained by the defect pool model applied to the defects near the interface of hydrogenated amorphous silicon thin film transistors. Gate dielectrics used include plasma deposited silicon nitrides, plasma deposited silicon oxides, and thermally grown silicon oxides. The most important property of the gate dielectric is not the chemical composition but the fixed charge. In particular, as‐deposited plasma deposited silicon oxide transistors can be made with similar properties to plasma deposited silicon nitride transistors or thermal silicon oxide transistors, by varying the fixed charge. After correcting the effects of the fixed charge variation, some differences still exist between the interface qualities. We introduce the parameter Ndb(min), i.e., the minimum density of dangling bonds (cm−2), which is a measure of interface quality independent of the fixed charge of the gate insulator. We propose that ...

Low-temperature (≤600°C) semi-insulating oxygen-doped silicon films by the PECVD technique for large-area power applications

Abstract This work describes the deposition, annealing and characterisation of semi-insulating oxygen-doped silicon films at temperatures compatible with polysilicon circuitry on glass. The semi-insulating layers are deposited by the plasma enhanced chemical vapour deposition technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures at a temperature of 350 °C. The as-deposited films are then furnace annealed at 600 °C which is the maximum process temperature. Raman analysis shows the as-deposited and annealed films to be completely amorphous. The most important deposition variable is the N 2 O SiH 4 gas ratio. By varying the N 2 O SiH 4 ratio the conductivity of the annealed films can be accurately controlled, for the first time, down to a minimum of ≈10−7Ω−1cm−1 where they exhibit a T −1 4 temperature dependence indicative of a hopping conduction mechanism. Helium dilution of the reactant gases is shown to improve both film uniformity and reproducibility. A model for the microstructure of these semi-insulating amorphous oxygen-doped silicon films is proposed to explain the observed physical and electrical properties.

Tetrahedral Amorphous Carbon Thin Film Transistors

This paper describes the design and fabrication of a carbon based thin film transistor (TFT). The active layer is formed from a novel form of amorphous carbon (a-C) known as tetrahedrally bonded amorphous carbon (ta-C) which can be deposited at room temperature using a filtered cathodic vacuum arc (FCVA) technique. In its ‘as grown’ condition, ta-C is p-type and the devices described here, produced using undoped material, exhibit p-channel operation.

A Semi-Insulating Layer for Novel High Voltage Polysilicon Thin Film Transistors

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Photoenhanced CVD of hydrogenated amorphous silicon using an internal hydrogen discharge lamp

This paper reviews the production of a-Si:H by photo-enhanced chemical vapour deposition using a novel windowless, internal hydrogen discharge lamp. The absence of highly charged species bombarding the film surface in the photoCVD process means that we have the potential to produce material with a lower defect state density and cleaner interfaces. Our technique avoids the problems of mercury contamination and window fogging. High quality a-Si:H has been produced at a growth rate of 4 A/s, with an optical bandgap of 1.75 eV, dark conductivity of 10-10-10-11 S/cm and AM1 conductivity of 10-4 S/cm, giving a photoconductivity ratio of 6–7 orders. We are currently investigating the manufacture of TFTs using our photoCVD produced material to compare their performance with more conventionally produced PECVD devices.

Capacitance voltage studies of hydrogenated amorphous silicon thin film transistors

Abstract We report Capacitance-Voltage (C-V) studies of charge trapping instabilities in hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) prepared with gate insulators of different quality. In poorer devices charge injection to the insulating layer dominates the threshold voltage shift, whereas in higher quality devices the stressing characteristics are more consistent with metastable state creation.

Low temperature ( ≤600 j C ) semi-insulating oxygen-doped silicon films by the PECVD technique for large area power applications

This work describes the annealing and characterisation of semi-insulating oxygen-doped silicon films deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The maximum process temperature is chosen to be compatible with large area polycrystalline silicon (poly-Si) circuitry on glass. The most important deposition variable is shown to be the N2OSiH4 gas ratio. Helium dilution results in improved film uniformity and reproducibility. Raman analysis shows the ‘as-deposited’ and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Investigation of novel high voltage polysilicon thin film transistors

The performance of novel polycrystalline silicon based High Voltage Thin Film Transistors (HV-TFT) have been investigated through the use of two dimensional device simulation programs. The advantages associated with use of a Semi Insulating Polysilicon (SIPOS) film between the gate and the drain in a polysilicon HV-TFT is demonstrated for the first time in this paper. The performance of a typical SIPOS HV-TFT is compared with a metal field plate HV-TFT (FP HV-TFT) through the use of two dimensional numerical device simulations. It is shown that the SIPOS film improves the breakdown voltage of the device.