Francesco Dantoni
Texas Instruments
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Francesco Dantoni.
IEEE Journal of Solid-state Circuits | 2003
Ranjit Gharpurey; Naveen K. Yanduru; Francesco Dantoni; Petteri Litmanen; G. Sirna; Terry Mayhugh; C. Lin; Irene Yuanying Deng; Paul A. Fontaine; Fang Lin
A highly integrated direct-conversion receiver that satisfies requirements of the third-generation wide-band code-division multiple-access mobile phone standard is described. The receiver integrated circuit includes the front-end low-noise amplifier, downconversion mixers, baseband variable-gain amplifiers, channel-select filters, and the frequency synthesizer. External components are limited to matching elements required for the low-noise amplifier and the mixers and two passive band-select filters. The receiver is implemented in a SiGe BiCMOS process and consumes a total current of 46 mA from a 2.7-V supply.
custom integrated circuits conference | 2002
Ranjit Gharpurey; Naveen K. Yanduru; Francesco Dantoni; Petteri Litmanen; G. Sirna; Terry Mayhugh; C. Lin; Irene Deng; Paul A. Fontaine; Fang Lin
A highly integrated direct-conversion receiver that satisfies requirements of the third generation Wideband Code Division Multiple Access (WCDMA) mobile phone standard is described. The receiver IC includes the front-end low-noise amplifier, down-conversion mixers, channel select filters, baseband variable gain amplifiers, and the entire frequency synthesizer, including the voltage controlled oscillator, buffers and phase-locked loop.
radio frequency integrated circuits symposium | 2001
Francesco Dantoni; A. Holden; S.T. Fu; D. Sahu; S. Venkatraman; S.H.K. Embabi
A highly integrated dual conversion heterodyne GPS receiver is reported. The receiver chip includes a 2.9 dB NF LNA, an image-reject mixer with 32 dB image rejection. The on-chip IF chain, which consists of a VGA, a 2nd mixer and filtering, has a maximum gain of 83 dB, a gain range of 45 dB and a 7 dB NF. A 4-bit ADC is integrated on chip for enhanced SNR. The PLL with its VCO are also integrated. The total NF is 3 dB with a total 121 dB voltage gain. The chip consumes 132 mW at 2.7 V.
international solid-state circuits conference | 2011
Gabriele Manganaro; Domine M. W. Leenaerts; Francesco Dantoni; A. Baschirotto; Bogdan Staszewski; Nikolaus Klemmer; Seongchol Hong
Digital cellular standards have emerged over the past 20 years. As a consequence modern cellular handheld radios make use of highly digitized transceiver architectures. This is in contrast to wireless infrastructure systems where nowadays still traditional analog-intensive radio architecture concepts are used, partly owing to more demanding performance requirements. However, future wireless infrastructures will move to more flexible and digitally-intensive architectures to address the increasing number of standards, modes and bands in cellular communication.
Archive | 2005
Samuel D. Pritchett; Jeffrey A. Schlang; Francesco Dantoni
Archive | 2001
Ranjit Gharpurey; Naveen K. Yanduru; Petteri Litmanen; Francesco Dantoni
Archive | 2010
Salvatore Finocchiaro; Francesco Dantoni
Archive | 2001
Samuel D. Pritchett; Jeffrey A. Schlang; Sherif Embabi; Alan Holden; Francesco Dantoni
Archive | 2004
Francesco Dantoni; Anil Kumar
Archive | 2013
Nagarajan Viswanathan; Visvesvaraya A. Pentakota; Robert C. Keller; Thomas R. Neu; Francesco Dantoni