Francisco J. García-Sánchez

A Review of Core Compact Models for Undoped Double-Gate SOI MOSFETs

In this paper, we review the compact-modeling framework for undoped double-gate (DG) silicon-on-insulator (SOI) MOSFETs. The use of multiple gates has emerged as a new technology to possibly replace the conventional planar MOSFET when its feature size is scaled to the sub-50-nm regime. MOSFET technology has been the choice for mainstream digital circuits for very large scale integration as well as for other high-frequency applications in the low-gigahertz range. But the continuing scaling of MOSFET presents many challenges, and multiple-gate, particularly DG, SOI devices seem to be attractive alternatives as they can effectively reduce the short-channel effects and yield higher current drive. Core compact models, including the analysis for surface potential and drain-current, for both the symmetric and asymmetric DG SOI MOSFETs, are discussed and compared. Numerical simulations are also included in order to assess the validity of the models reviewed

Analytic solution of the channel potential in undoped symmetric dual-gate MOSFETs

We extend our previous Lambert function-based analytic solution for the surface potential of undoped-body single-gate bulk MOSFETs to offer an explicit analytic solution of the surface potential of undoped-body symmetric dual-gate devices. The error produced by the proposed solution compared to exact results is reasonably small for typical device dimensions and bias conditions.

Revisiting MOSFET threshold voltage extraction methods

Abstract This article presents an up-to-date review of the several extraction methods commonly used to determine the value of the threshold voltage of MOSFETs. It includes the different methods that extract this quantity from the drain current versus gate voltage transfer characteristics measured under linear operation conditions for crystalline and non-crystalline MOSFETs. The various methods presented for the linear region are adapted to the saturation region and tested as a function of drain voltage whenever possible. The implementation of the extraction methods is discussed and tested by applying them to real state-of-the-art devices in order to compare their performance. The validity of the different methods with respect to the presence of parasitic series resistance is also evaluated using 2-D simulations.

An Explicit Multiexponential Model as an Alternative to Traditional Solar Cell Models With Series and Shunt Resistances

Classical analyses of various conventional solar cell models are examined. They are unified through the separation of their linear and nonlinear components and the application of Thevenins theorem to the linear terms. An explicit multiexponential model with series and shunt resistances is proposed as an alternative to conventional implicit multiexponential models commonly used to describe significant parallel conduction mechanisms in real solar cells. The proposed model is better suited than conventional models for repetitive simulation applications because of its inherently higher computational efficiency. Its explicit nature is a very useful feature for direct analytic differentiation and integration. The models applicability has been assessed by parameter extraction and subsequent playback using synthetic I–V characteristics of a hypothetical solar cell at various illumination levels chosen purely for illustrative purposes.

A new approach to extract the threshold voltage of MOSFETs

A new method is presented to extract the threshold voltage of MOSFETs. It is developed based on an integral function which is insensitive to the drain and source series resistances of the MOSFETs. The method is tested in the environments of circuit simulator (SPICE), device simulation (MEDICI), and measurements.

An explicit multi-exponential model for semiconductor junctions with series and shunt resistances

An alternative explicit multi-exponential model is proposed to describe multiple, arbitrary ideality factor, conduction mechanisms in semiconductor junctions with parasitic series and shunt resistances. This Lambert function based model allows the terminal current to be expressed as an explicit analytical function of the applied terminal voltage, in contrast to the implicit-type conventional multi-exponential model. As a result this model inherently offers a higher computational efficiency than conventional models, making it better suited for repetitive simulation and parameter extraction applications. Its explicit nature also allows direct analytic differentiation and integration. The model’s applicability has been assessed by parameter extraction and subsequent playback using synthetic and experimental diode forward I–V characteristics.

Dielectric properties of fluid-saturated bone: a comparison between diaphysis and epiphysis.

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Indirect fitting procedure to separate the effects of mobility degradation and source-and-drain resistance in MOSFET parameter extraction

Abstract A new procedure is presented to separate the effects of source-and-drain series resistance and mobility degradation factor in the extraction of MOSFET model parameters. It requires only a single test device and it is based on fitting the I D ( V GS , V DS ) equation to the measured characteristics. Two types of bidimensional fitting are explored: direct fitting to the drain current and indirect fitting to the measured source-to-drain resistance. The indirect fitting is shown to be advantageous in terms of fewer number of iterations needed and wider extent of initial guess values range.

Modeling the Impact of Multi-Fingering Microwave MOSFETs on the Source and Drain Resistances

Modern MOSFETs operated at high frequencies are designed and fabricated using a multi-fingered structure to enhance performance, especially to reduce gate resistance. However, even though the layout-dependent effect of other parasitics, such as that related to the source and drain resistances, is becoming more important, it has not been extensively investigated at high frequencies. In this paper, source and drain resistances are experimentally determined and analyzed for several microwave MOSFETs to characterize their corresponding dependence on the layout. This allows for the quantification and modeling of the impact of the devices geometry on its parasitic extrinsic parameters. Physically based closed-form equations are proposed here to accurately represent S-parameters of MOSFETs operating at microwave frequencies with layouts considering different numbers of gate fingers, and grouping devices in cells with multiple source and drain junctions. The proposed models are compatible with SPICE-like circuit simulators, and an excellent model-experiment correlation is obtained when using the proposed scalable equations to represent different geometry MOSFETs up to 60 GHz.

An Explicit Analytic Compact Model for Nanocrystalline Zinc Oxide Thin-Film Transistors

A new explicit model for long-channel nanocrystalline zinc oxide thin-film transistors is presented. The proposed equation is fully explicit by virtue of its use of the Lambert function. Consequently, the drain current can be directly calculated without the need of numerical iteration or approximations. Additionally, the proposed equation is analytically differentiable, allowing the straightforward derivation of explicit expressions for the transconductance and the output conductance of these devices.