Juan Muci
Simón Bolívar University
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Publication
Featured researches published by Juan Muci.
Solid-state Electronics | 2000
A. Ortiz-Conde; F.J.G. Sanchez; Juan Muci
Abstract Exact closed form solutions based on the Lambert W -function are presented to express the forward current–voltage characteristics of non-ideal single-exponential diodes containing all possible combinations of series and shunt parasitic resistances. It is shown that these expressions could be useful for carrying out highly accurate computations at speeds almost as fast as those possible when using less precise approximate solutions based on common elementary functions.
IEEE Transactions on Electron Devices | 2007
A. Ortiz-Conde; Francisco J. García-Sánchez; Juan Muci; Slavica Malobabic; Juin J. Liou
In this paper, we review the compact-modeling framework for undoped double-gate (DG) silicon-on-insulator (SOI) MOSFETs. The use of multiple gates has emerged as a new technology to possibly replace the conventional planar MOSFET when its feature size is scaled to the sub-50-nm regime. MOSFET technology has been the choice for mainstream digital circuits for very large scale integration as well as for other high-frequency applications in the low-gigahertz range. But the continuing scaling of MOSFET presents many challenges, and multiple-gate, particularly DG, SOI devices seem to be attractive alternatives as they can effectively reduce the short-channel effects and yield higher current drive. Core compact models, including the analysis for surface potential and drain-current, for both the symmetric and asymmetric DG SOI MOSFETs, are discussed and compared. Numerical simulations are also included in order to assess the validity of the models reviewed
Microelectronics Reliability | 2013
A. Ortiz-Conde; Francisco J. García-Sánchez; Juan Muci; Alberto Terán Barrios; Juin J. Liou; Ching-Sung Ho
Abstract This article presents an up-to-date review of the several extraction methods commonly used to determine the value of the threshold voltage of MOSFETs. It includes the different methods that extract this quantity from the drain current versus gate voltage transfer characteristics measured under linear operation conditions for crystalline and non-crystalline MOSFETs. The various methods presented for the linear region are adapted to the saturation region and tested as a function of drain voltage whenever possible. The implementation of the extraction methods is discussed and tested by applying them to real state-of-the-art devices in order to compare their performance. The validity of the different methods with respect to the presence of parasitic series resistance is also evaluated using 2-D simulations.
Microelectronics Reliability | 2006
F.J. Garcia Sanchez; A. Ortiz-Conde; Juan Muci
Undoped-body MOSFETs are currently becoming increasingly important and the value of threshold voltage is often used to assess the reliability of fabricated devices. However there exists a disparity of threshold voltage criteria proposed for these novel devices. The concept of threshold voltage in undoped-body MOSFETs is examined and various existing criteria are analyzed and compared in an effort to clarify the ambiguity of the meaning of threshold and understand its dependence on technological parameters in these devices. Phenomenological considerations are also presented to shed light on the behavior of the sub-threshold slope with changing semiconductor body thickness.
Microelectronics Reliability | 2011
Denise Lugo-Muñoz; Juan Muci; A. Ortiz-Conde; Francisco J. García-Sánchez; Michelly de Souza; Marcelo Antonio Pavanello
An alternative explicit multi-exponential model is proposed to describe multiple, arbitrary ideality factor, conduction mechanisms in semiconductor junctions with parasitic series and shunt resistances. This Lambert function based model allows the terminal current to be expressed as an explicit analytical function of the applied terminal voltage, in contrast to the implicit-type conventional multi-exponential model. As a result this model inherently offers a higher computational efficiency than conventional models, making it better suited for repetitive simulation and parameter extraction applications. Its explicit nature also allows direct analytic differentiation and integration. The model’s applicability has been assessed by parameter extraction and subsequent playback using synthetic and experimental diode forward I–V characteristics.
international conference on solid state and integrated circuits technology | 2006
A. Ortiz-Conde; F.J. Garcia Sanchez; Slavica Malobabic; Juan Muci; R. Salazar
A surface potential-based drain current and transconductance model for undoped-body asymmetric double-gate MOSFETs are presented. They are built on the basis of the front and back surface potentials and a charge coupling variable evaluated at the source and drain ends. The model consists of single analytic equations which are valid for all bias conditions, from subthreshold to strong inversion and from linear to saturation operation. Its validity has been verified by comparison to numerical simulations
IEEE Transactions on Electron Devices | 2001
J.A. Salcedo; A. Ortiz-Conde; E.J.G. Sanchez; Juan Muci; J.J. Liou; Y. Yue
The threshold voltage of MOSFETs has traditionally been defined as the gate voltage required to cause the surface potential to be equal to twice the Fermi potential in the bulk of semiconductor. Such a definition, although widely used for modeling long-channel MOSFETs, becomes increasingly questionable for modern devices with diminishing channel lengths. In this paper a new approach is proposed which defines the threshold voltage based on the intersection of the two asymptotes of the surface potential for the depletion and strong inversion regions. The approach is tested in a simulation environment for MOS devices having different channel lengths, oxide thicknesses, and substrate doping concentrations.
Microelectronics Reliability | 2009
A. Ortiz-Conde; Francisco J. García-Sánchez; Juan Muci; Denise C Lugo Muñoz; Álvaro D Latorre Rey; Ching-Sung Ho; Juin J. Liou
Abstract A new procedure is presented to separate the effects of source-and-drain series resistance and mobility degradation factor in the extraction of MOSFET model parameters. It requires only a single test device and it is based on fitting the I D ( V GS , V DS ) equation to the measured characteristics. Two types of bidimensional fitting are explored: direct fitting to the drain current and indirect fitting to the measured source-to-drain resistance. The indirect fitting is shown to be advantageous in terms of fewer number of iterations needed and wider extent of initial guess values range.
international caribbean conference on devices, circuits and systems | 2006
A. Ortiz-Conde; F.J.G. Sanchez; Juan Muci; Slavica Malobabic
A physical model of the one-dimensional undoped oxide-silicon-oxide system is presented based on the solution of its surface potential versus distance. It is proved that both previous approximate analytical solutions, for the cases when the electric field does and does not vanish inside the semiconductor, are completely equivalent. Approximate asymptotic analytical solutions are presented and compared to exact results numerically calculated by iteration. The results attest to the excellent accuracy of this formulation
ieee conference on electron devices and solid-state circuits | 2005
F.J. Garcla-Satnchez; A. Ortiz-Conde; Juan Muci
Undoped-body MOSFETs display peculiar semiconductor body thickness dependent subthreshold regions. The very concept of threshold voltage in undoped-body devices is affected by the interpretation given to this behavior. The fundamental subthreshold behavior is examined here from the point of view of its extension and slope factor. Its dependence on technological parameters is analyzed in light of phenomenological considerations. It is found that the subthreshold region may potentially exhibit two coexisting subregions with ideal slope factors of 60 and 120 mV/dec.