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Featured researches published by G.F. Close.


Nano Letters | 2008

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

G.F. Close; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; H.-S. Philip Wong

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.


IEEE Transactions on Electron Devices | 2010

Fully Integrated Graphene and Carbon Nanotube Interconnects for Gigahertz High-Speed CMOS Electronics

Xiangyu Chen; Deji Akinwande; Kyeong-Jae Lee; G.F. Close; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; Jing Kong; H.-S.P. Wong

Carbon-based nanomaterials such as metallic single-walled carbon nanotubes, multiwalled carbon nanotubes (MWCNTs), and graphene have been considered as some of the most promising candidates for future interconnect technology because of their high current-carrying capacity and conductivity in the nanoscale, and immunity to electromigration, which has been a great challenge for scaling down the traditional copper interconnects. Therefore, studies on the performance and optimization of carbon-based interconnects working in a realistic operational environment are needed in order to advance the technology beyond the exploratory discovery phase. In this paper, we present the first demonstration of graphene interconnects monolithically integrated with industry-standard complementary metal-oxide-semiconductor technology, as well as the first experimental results that compare the performance of high-speed on-chip graphene and MWCNT interconnects. The graphene interconnects operate up to 1.3-GHz frequency, which is a speed that is commensurate with the fastest high-speed processor chips today. A low-swing signaling technique has been applied to improve the speed of carbon interconnects up to 30%.


IEEE Transactions on Nanotechnology | 2006

Analysis of the Frequency Response of Carbon Nanotube Transistors

Deji Akinwande; G.F. Close; H.-S.P. Wong

The characterizations of carbon nanotube transistors at high frequencies have so far been hindered by large parasitic and extrinsic capacitances. We present a quantitative analysis of the limitations imposed by probe pad parasitics on single-wall carbon nanotube transistor characterization at gigahertz frequencies. Our analysis reveals the various kinds of frequency responses that can be expected to be measured. Furthermore, we present design guidelines and a suitable device layout to achieve gain and bandwidth at gigahertz frequencies


international electron devices meeting | 2007

Fabrication and Characterization of Carbon Nanotube Interconnects

G.F. Close; H.-S.P. Wong

We have fabricated arrays of individual metallic multi-wall carbon nanotube interconnects. We have also collected about two hundred resistance measurements to compare four different contact metals: Al, Au, Ti and Pd. Au and Pd contacts gave the lowest resistance. To validate the concept of high-speed carbon nanotube (CNT) interconnect, we have extended our electrical measurements of individual multi-wall carbon nanotubes (MWCNTs) into the radio-frequency regime up to 15 GHz. We also discuss the reasons why the conductivity of commercial MWCNTs is not yet competitive with copper.


IEEE Transactions on Nanotechnology | 2008

Monolithic Integration of CMOS VLSI and Carbon Nanotubes for Hybrid Nanotechnology Applications

Deji Akinwande; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; G.F. Close; H.-S.P. Wong

We integrate carbon nanotube (CNT) fabrication with standard commercial CMOS very large scale integration on a single substrate suitable for emerging hybrid nanotechnology applications. This cointegration combines the inherent advantages of CMOS and CNTs. These emerging applications include CNT optical, biological, chemical, and gas sensors that require complex CMOS electronics for sensor control, calibration, and signal processing. We demonstrate the successful cointegration on a single chip with a vehicle circuit, a two-transistor cascode megahertz amplifier utilizing both silicon n-channel MOSFET and CNT transistors with a total power consumption of 62.5 muW.


international electron devices meeting | 2011

Carbon nanotube electronics - Materials, devices, circuits, design, modeling, and performance projection

H.-S. Philip Wong; Subhasish Mitra; Deji Akinwande; Cara Beasley; Yang Chai; Hong-Yu Chen; Xiangyu Chen; G.F. Close; Jie Deng; Arash Hazeghi; Jiale Liang; Albert Lin; Luckshitha Suriyasena Liyanage; Jieying Luo; Jason Parker; Nishant Patil; Max M. Shulaker; Hai Wei; Lan Wei; Jie Zhang

Three key advances in device technology must be made to realize the potential of carbon nanotube transistors: (1) aligned CNT density of ≥200 CNT/µm on a wafer scale, (2) stable p- and n-type doping on the same wafer with control over the doping level, (3) low resistance metal to CNT contact at short (<20 nm) contact length. CNFET technology has now advanced to a point where large scale circuit level demonstration can be contemplated. This is made possible by advances in wafer-scale CNT growth, multiple CNT transfer, and imperfection-immune design techniques to overcome mis-positioned CNTs [11] and m-CNTs (e.g. VMR [18–19] and ACCNT [27]). In order to minimize CNT-specific variations (e.g. CNT count variations [45]), circuit design techniques co-optimized with process technology will play an important role. In the near future, CNFET circuit performance demonstration at GHz clock speed with the requisite device density is expected.


IEEE Transactions on Nanotechnology | 2008

Assembly and Electrical Characterization of Multiwall Carbon Nanotube Interconnects

G.F. Close; H.-S.P. Wong

We demonstrate a general method to assemble and contact arrays of individual multiwall carbon nanotube (MWCNT) interconnects between electrodes in one batch. We have also collected about 200 resistance measurements to compare four different contact metals: Al, Au, Ti, and Pd. We have also measured the radio frequency characteristics of the assembled MWCNTs up to 15 GHz. High-resolution transmission electron microscopy analysis has been used to correlate the electrical and physical characteristics of the MWCNTs.


IEEE Transactions on Electron Devices | 2009

Measurement of Subnanosecond Delay Through Multiwall Carbon-Nanotube Local Interconnects in a CMOS Integrated Circuit

G.F. Close; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; H.-S.P. Wong

Due to their excellent electrical properties and small size, metallic carbon nanotubes (CNTs) are promising materials for interconnect wires in future integrated circuits. Indeed, simulations have firmly established CNTs as strong contenders for replacing or complementing copper interconnects. In this paper, we analyze the performances of a prototype 0.25-mum CMOS digital integrated circuit with select horizontal multiwall CNT (MWCNT) interconnects. Some local interconnect wires of the prototype chip were implemented, during a post-CMOS assembly process, by single 14-mum -long metallic MWCNT with 30-nm diameter, representative of future requirements for local interconnects. We evaluate the merits and challenges of MWCNT interconnects in a realistic silicon integrated-circuit environment. We experimentally extract the subnanosecond delays of these wires to quantitatively benchmark their future potential for the first time. Furthermore, we compare our experimental results with an existing MWCNT interconnect model, as well as with the expected performances of scaled copper wires. Finally, we discuss the origin of the discrepancies between our experimental results and the modeling projections.


european solid state device research conference | 2008

Monolithic integration of CMOS VLSI and CNT for hybrid nanotechnology applications

Deji Akinwande; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; G.F. Close; H.-S.P. Wong

We integrate carbon nanotube (CNT) fabrication with commercial CMOS VLSI fabrication on a single substrate suitable for emerging hybrid nanotechnology applications. This co-integration combines the inherent advantages of CMOS and CNTs. These emerging applications include CNT optical, biological, chemical, and gas sensors that require complex CMOS electronics for sensor control, calibration, and signal processing of sensor output. We demonstrate the successful co-integration on a single chip with a vehicle circuit; a two transistor cascode megahertz amplifier utilizing both silicon nMOS and CNT transistors.


international electron devices meeting | 2009

High-speed graphene interconnects monolithically integrated with CMOS ring oscillators operating at 1.3GHz

Xiangyu Chen; Kyeong Jae Lee; Deji Akinwande; G.F. Close; Shinichi Yasuda; Bipul C. Paul; Shinobu Fujita; Jing Kong; H.-S. Philip Wong

We have successfully experimentally integrated graphene interconnects with commercial 0.25µm technology CMOS ring oscillator circuit using conventional fabrication techniques, and demonstrated high speed on-chip graphene interconnects that operates above 1GHz.

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Deji Akinwande

University of Texas at Austin

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Jing Kong

Massachusetts Institute of Technology

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Kyeong-Jae Lee

Massachusetts Institute of Technology

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