G. K. Celler

Frontiers of silicon-on-insulator

Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.

Elastically relaxed free-standing strained-silicon nanomembranes

Strain plays a critical role in the properties of materials. In silicon and silicon–germanium, strain provides a mechanism for control of both carrier mobility and band offsets. In materials integration, strain is typically tuned through the use of dislocations and elemental composition. We demonstrate a versatile method to control strain by fabricating membranes in which the final strain state is controlled by elastic strain sharing, that is, without the formation of defects. We grow Si/SiGe layers on a substrate from which they can be released, forming nanomembranes. X-ray-diffraction measurements confirm a final strain predicted by elasticity theory. The effectiveness of elastic strain to alter electronic properties is demonstrated by low-temperature longitudinal Hall-effect measurements on a strained-silicon quantum well before and after release. Elastic strain sharing and film transfer offer an intriguing path towards complex, multiple-layer structures in which each layer’s properties are controlled elastically, without the introduction of undesirable defects.

Spatially controlled crystal regrowth of ion-implanted silicon by laser irradiation

We demonstrate the unique capability of a repetitively pulsed laser to ’’write’’ a monocrystalline pattern in ion‐implanted amorphous silicon layers. Ion‐channeling data, from the samples scanned with a focused beam of a Q‐switched Nd : YAG laser, show a continuity of the single‐crystal layer produced with spatially overlapping laser pulses, at 60–80 MW cm−2. Scattering yields indicate very high substitutionality of the implanted ions and an interdependence between the laser power density and the depth redistribution of the implants. Finally, similar recrystallization was obtained with a CO2 laser at 10.6 μm.

Electronic transport in nanometre-scale silicon-on-insulator membranes

The widely used ‘silicon-on-insulator’ (SOI) system consists of a layer of single-crystalline silicon supported on a silicon dioxide substrate. When this silicon layer (the template layer) is very thin, the assumption that an effectively infinite number of atoms contributes to its physical properties no longer applies, and new electronic, mechanical and thermodynamic phenomena arise, distinct from those of bulk silicon. The development of unusual electronic properties with decreasing layer thickness is particularly important for silicon microelectronic devices, in which (001)-oriented SOI is often used. Here we show—using scanning tunnelling microscopy, electronic transport measurements, and theory—that electronic conduction in thin SOI(001) is determined not by bulk dopants but by the interaction of surface or interface electronic energy levels with the ‘bulk’ band structure of the thin silicon template layer. This interaction enables high-mobility carrier conduction in nanometre-scale SOI; conduction in even the thinnest membranes or layers of Si(001) is therefore possible, independent of any considerations of bulk doping, provided that the proper surface or interface states are available to enable the thermal excitation of ‘bulk’ carriers in the silicon layer.

Periodic regrowth phenomena produced by laser annealing of ion‐implanted silicon

We have discovered that interference effects extant during pulsed laser irradiation annealing of ion‐implanted silicon produce periodic property variations in the annealed material that mimic the interference pattern. These are manifest at near‐annealing threshold power densities as surface ripple and at higher power densities may be revealed by etching. The surface ripple observed at low power densities is correlated with the occurrence of polycrystalline silicon regions in the annealed material. Our observations suggest that surface melting and epitaxial regrowth are responsible for the annealing effect.

High quality Si‐on‐SiO2 films by large dose oxygen implantation and lamp annealing

Ion beam synthesis of a buried SiO2 layer is an attractive silicon‐on‐insulator technology for high‐speed complementary metal‐oxide‐semiconductor circuits and radiation hardened devices. We demonstrate here a new annealing procedure at 1405 °C that produces silicon films of excellent quality, essentially free of oxygen precipitates and with sharp interfaces between the Si and the SiO2. Buried oxide layers have been formed in Si (100) wafers by implanting 400 keV molecular oxygen at 500 °C to a dose of 1.8×1018 cm−2. Annealing was performed by radiative heating of the back side of each sample to the melt temperature of silicon, TM=1412 °C, so that the buried oxide structure was at 1405 °C. The temperature control relies entirely on the change in optical properties of silicon upon melting. This ensures, without any external feedback, that the surface exposed to the photon flux will remain at TM.

Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application

In this paper, we present a comprehensive experimental characterization of electron and hole effective mobility (/spl mu//sub eff/) of ultrathin SOI n- and p-MOSFETs. Measurements have been performed at different temperatures using a special test structure able to circumvent parasitic resistance effects. Our results indicate that, at large inversion densities (N/sub inv/), the mobility of ultrathin SOI transistors is largely insensitive to silicon thickness (T/sub SI/) and is larger than in heavily doped bulk MOS because of a lower effective field. At small N/sub inv/, instead, mobility of SOI transistors exhibits a systematic reduction with decreasing T/sub SI/. The possible explanation for this /spl mu//sub eff/ degradation in extremely thin silicon layers is discussed by means of a comparison to previously published experimental data and theoretical calculations. Our analysis suggests a significant role is played by an enhancement of phonon scattering due to carrier confinement in the thinnest semiconductor films. The experimental mobility data have then been used to study the possible implications for ultrashort SOI transistor performance using numerical simulations.

12-GHz thin-film transistors on transferrable silicon nanomembranes for high-performance flexible electronics.

Multigigahertz flexible electronics are attractive and have broad applications. A gate-after-source/drain fabrication process using preselectively doped single-crystal silicon nanomembranes (SiNM) is an effective approach to realizing high device speed. However, further downscaling this approach has become difficult in lithography alignment. In this full paper, a local alignment scheme in combination with more accurate SiNM transfer measures for minimizing alignment errors is reported. By realizing 1 μm channel alignment for the SiNMs on a soft plastic substrate, thin-film transistors with a record speed of 12 GHz maximum oscillation frequency are demonstrated. These results indicate the great potential of properly processed SiNMs for high-performance flexible electronics.

An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode

In this paper, we report an experimental investigation of electron mobility in ultrathin SOI MOSFETs operated in double-gate mode. Mobility is measured for silicon thickness down to approximately 5 nm and for different temperatures. Mobility data in single- and double-gate mode are then compared according to two different criteria imposing either the same total inversion charge density or the same effective field in the two operating modes. Our results demonstrate that for silicon films around 10 nm or thinner and at small inversion densities, a modest but unambiguous mobility improvement for double-gate mode operation is observed even if the same effective field as in the single-gate mode is kept. Furthermore, we also document that the mobility in double-gate mode can improve markedly above single-gate mobility when the comparison is made at the same total inversion density. This latter feature of the double-gate operating mode can be very beneficial in the perspective of very-low voltage operation.

Flexible photodetectors on plastic substrates by use of printing transferred single-crystal germanium membranes

This letter presents studies of multiwavelength flexible photodetectors on a plastic substrate by use of printing transferred single-crystal germanium (Ge) membranes. Ge membranes of 250nm thickness with selectively ion-implantation doped regions were released from a germanium-on-insulator substrate and integrated with a 175-μm-thick polyethylene terephthalate substrate via a dry printing technique. Photodiodes configured in lateral p-i-n configuration using the flexible Ge membranes with an intrinsic region width of 10μm exhibit an external quantum efficiency that varies from 5% at 411nm to 42% at 633nm under −1V bias condition. These results demonstrate the potential of utilizing single-crystal Ge-membrane photodiodes for imaging applications and as solar cells on objects with arbitrary curvatures and shapes.