G. Reimbold

Electrical analysis of mechanical stress induced by STI in short MOSFETs using externally applied stress

This paper presents an electrical analysis of mechanical stress induced by shallow trench isolation (STI) on MOSFETs of advanced 0.13 /spl mu/m bulk and silicon-on-insulator (SOI) technologies. By applying external calibrated stress, we present piezoresistive coefficients measurements on these technologies, and we compare small and long transistors electrical responses, evidencing the strong effect of source drain resistance R/sub sd/. Then, using the same approach on short devices with different gate-edge-to-STI distances, we quantitatively evaluate stress profile induced by STI and its mean value under the gate of the devices. Results are discussed to explain differences between bulk and SOI technologies, as well as between nMOS and pMOS. We show that the observed higher pMOS drain current shift is related to the process, and may be explained by doping amorphization and recrystallization effects, and not by a piezoresistive coefficient difference as usually assumed.

Characterization and modeling of hysteresis phenomena in high K dielectrics

An original technique for the dynamic analysis of Id(Vg) hysteresis on high K stacks is proposed, allowing the characterization of Vt shift transients at short times. The experimental results demonstrate that trapping/de-trapping mechanism by tunneling from the substrate must be considered. Furthermore, a new model based on a trap-like approach is successfully developed to interpret the dependence of hysteresis phenomena with high k gate stack architecture.

Experimental and theoretical study of electrode effects in HfO 2 based RRAM

In this work, the impact of Ti electrodes on the electrical behaviour of HfO2-based RRAM devices is conclusively clarified. To this aim, devices with Pt, TiN and Ti electrodes have been fabricated (see Fig. 1). We first provide several experiments to clearly demonstrate that switching is driven by creation-disruption of a conductive filament. Thus, the role of TiN/Ti electrodes is explained and modeled based on the presence of HfOx interfacial layer underneath the electrode. In addition, Ti is found responsible to activate bipolar switching. Moreover, it strongly reduces forming and switching voltages with respect to Pt-Pt devices. Finally, it positively impacts on retention. To support and interpret our results we provide physico-chemical measurements, electrical characterization, ab-initio calculations and modeling.

Large-Scale Time Characterization and Analysis of PBTI In HFO2/Metal Gate Stacks

Many electrical properties of metal/high-k gate stack are dominated by defects. These defects play an important role in reliability issues in particular positive bias temperature instabilities (PBTI). In this paper, we investigate PBTI with a time resolved measurement technique allowing a large-scale time characterization. This technique allows us to separate different mechanisms, namely fast and slow trapping, newly slow stress-generated traps and finally positive charges. We clearly evidence which of them are or are not activated by temperature. We explain how to take into account these mechanisms for a precise lifetime extrapolation

N-doped GeTe as performance booster for embedded Phase-Change Memories

The commercialization of Phase-Change Memories (PCM), based on the well-known GST compound, have been recently started, tailored for consumer applications. Despite other excellent performances (i.e. low-power, scalability,…), data retention is assured up to 85°C, still limited for the automotive market segment. Alternative active material able to comply with the stringent requirements of automotive applications should possibly exhibit higher crystallization temperature (TC) as well as higher Activation Energy (EA) with respect to GST. Recent literature shows that GeTe provides better retention [1–3], while several works put in evidence how data retention is enhanced by inclusions in pure host alloys [4–6].

Transport mechanisms and charge trapping in thin dielectric/Si nano-crystals structures

Abstract In this work the transport mechanisms and charge trapping of novel dielectric systems based on semiconductor nano-crystals embedded in a dielectric matrix are studied. In particular, stacked films composed of a thin bottom dielectric (2–4 nm thick SiO 2 or Si 3 N 4 ), with an embedded two-dimensional (2-D) array of Si nano-crystals (obtained by low pressure chemical vapor deposition or by annealing of silicon rich oxide) and a thick top dielectric (8 nm-thick SiO 2 ) are investigated. Gate leakage currents, at medium/high electric fields, are examined at temperatures varying between 77 and 473 K. Charge trapping phenomena, occurring at low electric fields, are studied as a function of the stressing gate voltage and the stressing time. Experimental results are explained by means of an elastic tunneling model, which takes into account the main structural characteristics of the Si-dots (size dispersion, density, spatial distribution) as well as the effect of trapped charges in the silicon nano-crystals.

Electrical characterization and modeling of MOS structures with an ultra-thin oxide ☆

Abstract Ultra-thin oxides (1–3 nm) are foreseen to be used as gate dielectric in CMOS technology during the next 10 years. Nevertheless, they require new approaches in modeling and characterization due to the onset of quantum effects (confinement and direct tunneling). In this paper, the modeling of quantum effects is briefly reviewed, underlining recent results. An original method to extract the oxide thickness from C – V measurement without using time-consuming simulation is proposed. Moreover an analytical model for the gate current in the inversion regime is developed based on the concept of impact frequency and within the variational approach for quantum confinement. Finally, a new experimental procedure for effective mass and barrier height extraction in thin oxides is presented.

Comparative Assessment of GST and GeTe Materials for Application to Embedded Phase-Change Memory Devices

This work presents a thorough comparative assessment of undoped GST and GeTe active phase-change (PC) materials for application to embedded memory devices (in particular consumer and automotive products). The material screening and qualification is performed through optical reflectivity and 4-probes resistivity measurements. Electrical performances are then investigated through tests of lance-cell analytical PC memory cells. Reset current densities of GST and GeTe are comparable, while GeTe data-retention at high- temperature is significantly improved compared to GST, suggesting that GeTe-based compounds are promising candidates for embedded PC memory applications.

Light emission microscopy for thin oxide reliability analysis

Abstract We present a wide analysis of light emission phenomenon in thin gate oxide. For thickness ranging from 45 to 230A, we study the dependence of photon emission rate with gate oxide thickness and gate materials. Soft breakdown occurring in ultra thin oxide is also analysed.

Initial and PBTI-induced traps and charges in Hf-based oxides/TiN stacks.

Abstract Positive voltage instabilities are studied for Nmos transistors with hafnium-based high-κ gate stacks. Using an optimized dedicated fast measurement setup, dynamic transient measurements of drain current are performed over more than ten decades of time. The two main phenomena involved, a reversible one known as hysteresis and a nonreversible one known as PBTI are clearly experimentally separated and studied in detail. A physical model is presented, explaining the dynamic behaviour and leading to precise traps physical characteristics and profiles inside the HfO2 layer. PBTI defects in HfO2 are shown to be of a different nature than hysteresis traps. A turn-around effect is evidenced for PBTI above which physical mechanisms seem to change; it has important implications on lifetime determination methodology. Finally, HfSiON experiments are presented for both hysteresis and PBTI and they show that this material is much less critical than HfO2.