G. Ternent

Nanofabrication of high aspect ratio (∼50:1) sub-10 nm silicon nanowires using inductively coupled plasma etching

The development of nanofabrication techniques for creating high aspect ratio (∼50:1) sub-10 nm silicon nanowires (SiNWs) with smooth, uniform, and straight vertical sidewalls using an inductively coupled plasma (ICP) etching process at 20 °C is reported. In particular, to improve the quality and flexibility of the pattern transfer process for high aspect ratio SiNWs, hydrogen silsesquioxane, a high-resolution, inorganic, negative-tone resist for electron-beam lithography has been used as both the resist for defining sub-10 nm patterns and the hard mask for etching the underneath silicon material. The effects of SF6/C4F8 gas flow rates, chamber pressure, platen power and ICP power on the etch rate, selectivity, and sidewall profile are investigated. To minimize plasma-induced sidewall damage, moderate plasma excitation power (ICP power of 600 W) and low ion energy (platen power of 6–12 W) were used. Using the optimized etch process at room temperature (20 °C), the authors have successfully fabricated sub-1...

Metal gate strained silicon MOSFETs for microwave integrated circuits

In this work a III-V MODFET fabrication process has been adapted to fabricate metal gate silicon based MOSFETs. A range of MOSFETs with gate lengths varying from 1 /spl mu/m to 120 nm were fabricated and all showed good transistor action. The gate metal was Ti/Pd/Au 200 nm thick and both pyramidal and T shaped gates were fabricated. The parasitic gate-source capacitance was reduced by using a spin on dielectric. The strained silicon MOSFETs with rectangular 0.3 /spl mu/m Ti/Pd/Au gates had measured f/sub T/ and f/sub max/, of 11 GHz and 12 GHz respectively. By de-embedding the parasitic pad capacitance the intrinsic f/sub T/ and f/sub max/ are 20 GHz and 21 GHz.

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

A new high-performance normally-off gallium nitride (GaN)-based metal-oxide-semiconductor high electron mobility transistor that employs an ultrathin subcritical 3 nm thick aluminium gallium nitride (Al0.25Ga0.75N) barrier layer and relies on an induced two-dimensional electron gas for operation is presented. Single finger devices were fabricated using 10 and 20 nm plasma-enhanced chemical vapor-deposited silicon dioxide (SiO2) as the gate dielectric. They demonstrated threshold voltages (Vth) of 3 and 2 V, and very high maximum drain currents (IDSmax) of over 450 and 650 mA/mm, at a gate voltage (VGS) of 6 V, respectively. The proposed device is seen as a building block for future power electronic devices, specifically as the driven device in the cascode configuration that employs GaN-based enhancement-mode and depletion-mode devices.

Electronic control of coherence in a two-dimensional array of photonic crystal surface emitting lasers

We demonstrate a semiconductor PCSEL array that uniquely combines an in-plane waveguide structure with nano-scale patterned PCSEL elements. This novel geometry allows two-dimensional electronically controllable coherent coupling of remote vertically emitting lasers. Mutual coherence of the PCSEL elements is verified through the demonstration of a two-dimensional Young’s Slits experiment. In addition to allowing the all-electronic control of the interference pattern, this type of device offers new routes to power and brightness scaling in semiconductor lasers, and opportunities for all-electronic beam steering.

SPICE Modeling of the Scaling of Resonant Tunneling Diodes and the Effects of Sidewall Leakage

Si/SiGe and AlGaAs/GaAs resonant tunneling diodes (RTDs) are realized using a self-aligned fabrication process with dimensions ranging from 50 μm down to 30 nm. Using these devices, scaling rules are developed and incorporated into a modified SPICE model. The depletion width and the sidewall current are extracted from the model. The results confirm that the parasitic sidewall current is responsible for the reduction in peak-to-valley current ratio (PVCR) in small-diameter RTDs. A new device layout is demonstrated to significantly reduce the sidewall current for optimum nanoscale performance. Improvements in the PVCRs are demonstrated by this approach.

Coherently Coupled Photonic-Crystal Surface-Emitting Laser Array

The realization of a 1 × 2 coherently coupled photonic crystal surface emitting laser array is reported. New routes to power scaling are discussed and the electronic control of coherence is demonstrated.

GaAs-based distributed feedback laser at 780 nm for 87 Rb cold atom quantum technology

The UK Quantum Technology Hub in Sensors and Metrology [1] has the aim of developing integrated, small and practical cold atom systems for a range of sensor and timing applications which includes rotation, magnetism, gravity and atomic clocks. The approach is similar to that pioneered by the chip scale atomic clock [2] where atoms held in microfabricated vacuum chambers have atomic transitions excited and probed by diodes lasers [3] and photodetectors. That system used coherent population trapping for the clock transitions whilst we are aiming to first produce lasers for cooling and trapping ions inside vacuum chambers before microwave pulses or controlled lasers are used to create superposition states, recombine them and measure the interference from the final state populations. For cooling 87Rb atoms, 780.24 nm lasers with linewidths below ∼5 MHz are required whilst the lasers for controlling and measuring superposition states typically external cavity lasers have been used to achieve linewidths from 20 kHz [3] down to a few Hz [4]. Most single mode diode lasers aimed at laser cooling have used DBR gratings with regrowth [5] but this is challenging when using AlGaAs materials due to oxidation.

A GaAs-based self-aligned stripe distributed feedback laser

We demonstrate operation of a GaAs-based self-aligned stripe (SAS) distributed feedback (DFB) laser. In this structure, a first order GaInP/GaAs index-coupled DFB grating is built within the p-doped AlGaAs layer between the active region and the n-doped GaInP opto-electronic confinement layer of a SAS laser structure. In this process no Al-containing layers are exposed to atmosphere prior to overgrowth. The use of AlGaAs cladding affords the luxury of full flexibility in upper cladding design, which proved necessary due to limitations imposed by the grating infill and overgrowth with the GaInP current block layer. Resultant devices exhibit single-mode lasing with high side-mode-suppression of >40 dB over the temperature range 20 °C–70 °C. The experimentally determined optical profile and grating confinement correlate well with those simulated using Fimmwave.

Coherently Coupled Photonic Crystal Surface Emitting Lasers

In this paper we demonstrate coherently coupled PCSELs. By utilising allsemiconductor PCSELs, realised by MOVPE re-growth [6], we fabricate PCSELs coupled by an electrically driven region (“coupler”), shown schematically in Fig. 2, allowing the electronic control of coherence between emitters. This is made possible due to the small modal refractive index change between coupler and PCSEL in our all-semiconductor device. Both coupled PCSELs have a threshold current of ~65mA and matched emission wavelengths of 986.5nm due to nominally identical photonic crystal structures.

Silicon nanowire devices with widths below 5 nm

This paper describes a robust process for the fabrication of highly doped Silicon-On-Insulator nanowires and devices. The process uses electron-beam lithography, low-damage dry etch and controlled thermal oxidation to deliver consistent, reproducible and reliably nanowires of nominal widths from 100 nm down to sub-5 nm etched to a depth of 55 nm in silicon. Initial electrical measurements indicate metallic behavior for the widest wires and below a particular width, the wires become depleted showing electrical behaviour consistent with Coulomb blockade at room temperature.