Gabriel Eirea

Hybrid modelling and control of power electronics

Switched circuits in power electronics by their nature present hybrid behavior. Such circuits can be described by a set of discrete states with associated continuous dynamics. A control objective, usually regulation of the output in the face of disturbances in the continuous system, is accomplished by choosing among discrete states. We describe a hybrid systems perspective of several common tasks in the design and analysis of power electronics. A DC-DC boost converter circuit is presented as an illustrative example, and the extension of this circuit to a multiple output configuration is provided to show the favorable scaling properties and broad utility of the hybrid approach.

Phase Current Unbalance Estimation in Multiphase Buck Converters

A method for estimating the phase current unbalance in a multiphase buck converter is presented. The method uses the information contained in the voltage drop at the input capacitors effective series resistance (ESR) to estimate the average current in each phase. Although the absolute estimation of the currents depends on the value of the ESR and is therefore not absolutely accurate, the relative estimates of the currents with respect to one other are shown to be very accurate. The method can be implemented with a low-rate down-sampling A/D converter and is not computationally intensive. Experimental results are presented, showing good agreement between the estimates and the measured values.

Adaptive Output Current FeedforwardControl in VR Applications

A method for adapting the gain of an output current feedforward path in voltage regulation (VR) applications is presented. For regulators using adaptive voltage positioning, output current feedforward can improve the dynamic response to fast load transients. However, the feedforward path depends on parameters of the power train that are not known with precision. By analyzing the error voltage and finding its correlation with the parameter error, a gradient algorithm is derived that makes the parameter error vanish and minimizes the voltage error. The algorithm was verified with simulations and experiments on a four-phase prototype VR board with an field programmable gate array-based digital control implementation.

A formal approach to fault tree synthesis for the analysis of distributed fault tolerant systems

Designing cost-sensitive real-time control systems for safety-critical applications requires a careful analysis of both performance versus cost aspects and fault coverage of fault tolerant solutions. This further complicates the difficult task of deploying the embedded software that implements the control algorithms on a possibly distributed execution platform (for instance in automotive applications). In this paper, we present a novel technique for constructing a fault tree that models how component faults may lead to system failure. The fault tree enables us to use existing commercial analysis tools to assess a number of dependability metrics of the system. Our approach is centered on a model of computation, Fault Tolerant Data Flow (FTDF), that enables the integration of formal verification techniques. This new analysis capability is added to an existing design framework, also based on FTDF, that enables a synthesis-based, correct-by-construction, design methodology for the deployment of real-time feedback control systems in safety critical applications.

Phase current unbalance estimation in multi-phase buck converters

A method for estimating the phase current unbalance in a multiphase buck converter is presented. The method uses the information contained in the voltage drop at the input capacitors effective series resistance (ESR) to estimate the average current in each phase. Although the absolute estimation of the currents depends on the value of the ESR and is therefore not absolutely accurate, the relative estimates of the currents with respect to one other are shown to be very accurate. The method can be implemented with a low-rate down-sampling A/D converter and is not computationally intensive. Experimental results are presented, showing good agreement between the estimates and the measured values.

High Precision Load Current Sensing Using On-Line Calibration of Trace Resistance

A method for the on-line calibration of a circuit board trace resistance at the output of a buck converter is described. The input current is measured with a precision resistor and processed to obtain a dc reference for the output current. The voltage drop across a trace resistance at the output is amplified with a gain that is adaptively adjusted to match the dc reference. This method is applied to obtain an accurate and high-bandwidth measurement of the load current in the modern microprocessor voltage regulator application (VRM), thus enabling an accurate dc load-line regulation as well as a fast transient response. Experimental results show an accuracy well within the tolerance band of this application, and exceeding all other popular methods.

Modeling of PWM inverter-supplied AC drives at low switching frequencies

Presents analytical results, numerical simulations, and experiments that quantify effects of low-switching frequency in ac drives supplied by pulsewidth modulated (PWM) power electronic inverters. Specifically, the paper re-examines models of PWM inverters in cases when the switching frequency is only an order of magnitude higher than the fundamental of the ac waveform being synthesized. While the case of permanent magnet synchronous motor is studied in detail, the presented modeling procedure is applicable to other ac drives. Analytical results derived in the paper build on related results for do converters, and address the case of the PWM switching policy denoted as space vector modulation in industrial practice. Conventional modeling procedures assume that the PWM switching frequency is high enough so that the resulting waveform can be replaced by its first harmonic in control-oriented models. This paper provides analytical formulas in terms of the system parameters that quantify the deviations introduced by a slow PWM switching frequency.

Selective active filtering for four-wire loads: Control and balance of split capacitor voltages

This paper presents a controller for the DC voltages on the split capacitor topology for a four-wire selective active filter. A simple model for the dynamics of the two capacitor voltages is derived under the assumption of time-scale separation between the dynamics of the inverter currents and the capacitor voltages. The controller proposed is based on physical principles and can be easily integrated with existing four-wire active filter controllers based on instantaneous reactive power (p-q) theory. Simulations and experimental results illustrate the benefits of the solution proposed.

High Precision Load Current Sensing using On-Line Calibration of Trace Resistance in VRM Applications

A method for the on-line calibration of a circuit board trace resistance at the output of a buck converter is described. The input current is measured with a precision resistor and processed to obtain a dc reference for the output current. The voltage drop across a trace resistance at the output is amplified with a gain that is adaptively adjusted to match the dc reference. This method is applied to obtain an accurate and high-bandwidth measurement of the load current in the modern microprocessor voltage regulator application (VRM), thus enabling an accurate dc load-line regulation as well as a fast transient response. Experimental results show an accuracy well within the tolerance band of this application, and exceeding all other popular methods.

Modular architecture for Ultra Low Power Switched-Capacitor DC-DC Converters

This work presents a novel modular architecture for a step-down Switched-Capacitor Converter for Ultra Low Power applications. The modularity of the architecture allows to generate any conversion ratio in the same way. Additionally a technique for increasing efficiency by recycling the charge stored in parasitic capacitances is presented, which reduced the losses due to this cause in 80%. An example of converter with four conversion ratios for a supply voltage of 2.8V, load current up to 100μA in a 0.5μm CMOS process was designed and electrically simulated. The efficiency achieved for the 4/5 conversion ratio is above 77% for one order of magnitude of the load current.