Seth R. Sanders

Generalized averaging method for power conversion circuits

The method of state-space averaging has been successfully applied to pulse-width modulated power converters, but has its limitations with switched circuits that do not satisfy a small-ripple condition. A more general averaging procedure that encompasses state-space averaging and is potentially applicable to a much broader class of circuits and systems is considered. In particular, the technique is shown to be effective on a number of examples, including resonant-type converters. The method may find applications in simulation as well as design, since it is considerably easier to simulate an averaged model than a switched model.<<ETX>>

Quantization resolution and limit cycling in digitally controlled PWM converters

This paper discusses the presence of steady-state limit cycles in digitally controlled pulse-width modulation (PWM) converters, and suggests conditions on the control law and the quantization resolution for their elimination. It then introduces single-phase and multi-phase controlled digital dither as a means of increasing the effective resolution of digital PWM (DPWM) modules, allowing for the use of low resolution DPWM units in high regulation accuracy applications. Bounds on the number of bits of dither that can be used in a particular converter are derived. Finally, experimental results confirming the theoretical analysis are presented.

Observers for flux estimation in induction machines

Flux estimation in induction machines is examined from the viewpoint of observer theory. It is pointed out that estimators presently used in connection with schemes such as field-oriented control are typically real-time simulations of machine equations, without feedback of any corrective prediction error. It is shown that corrective feedback can be used to speed up convergence of the flux estimates. It can also reduce the sensitivity of the estimates to parameter variations. >

Analysis and Optimization of Switched-Capacitor DC–DC Converters

Analysis methods are developed that fully determine a switched-capacitor (SC) dc-dc converters steady-state performance through evaluation of its output impedance. This analysis method has been verified through simulation and experimentation. The simple formulation developed permits optimization of the capacitor sizes to meet a constraint such as a total capacitance or total energy storage limit, and also permits optimization of the switch sizes subject to constraints on total switch conductances or total switch volt-ampere (V-A) products. These optimizations then permit comparison among several switched-capacitor topologies, and comparisons of SC converters with conventional magnetic-based dc-dc converter circuits, in the context of various application settings. Significantly, the performance (based on conduction loss) of a ladder-type converter is found to be superior to that of a conventional magnetic-based converter for medium to high conversion ratios.

A 4-/spl mu/a quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications

This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm/sup 2/ in 0.25-/spl mu/m CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 /spl mu/A.

A low-voltage CMOS DC-DC converter for a portable battery-operated system

Motivated by emerging battery-operated applications that demand compact, lightweight, and highly efficient DC-DC power converters, a buck circuit is presented in which all active devices are integrated on a single chip using a standard 1.2 /spl mu/ CMOS process. The circuit delivers 750 mW at 1.5 V from a 6 V battery. To effectively eliminate switching loss at high operating frequencies, the power transistors achieve nearly ideal zero-voltage switching (ZVS) through an adjustable dead-time control scheme. The silicon area and power consumption of the gate-drive buffers are reduced with a tapering factor that minimizes short-circuit current and dynamic dissipation for a given technology and application. Measured results on a prototype IC indicate that on-chip losses at full load can be kept below 8% at 1 MHz.<<ETX>>

Design Techniques for Fully Integrated Switched-Capacitor DC-DC Converters

This paper describes design techniques to maximize the efficiency and power density of fully integrated switched-capacitor (SC) DC-DC converters. Circuit design methods are proposed to enable simplified gate drivers while supporting multiple topologies (and hence output voltages). These methods are verified by a proof-of-concept converter prototype implemented in 0.374 mm2 of a 32 nm SOI process. The 32-phase interleaved converter can be configured into three topologies to support output voltages of 0.5 V-1.2 V from a 2 V input supply, and achieves 79.76% efficiency at an output power density of 0.86 W/mm2 .

Lyapunov-based control for switched power converters

The fundamental properties, such as passivity or incremental passivity, of the network elements making up a switched power converter are examined. The nominal open-loop operation of a broad class of such converters is shown to be stable in the large via a Lyapunov argument. The obtained Lyapunov function is then shown to be useful for designing globally stabilizing controls that include adaptive schemes for handling uncertain nominal parameters. Numerical simulations illustrate the application of this control approach in DC-DC converters.<<ETX>>

Digital PWM control: application in voltage regulation modules

Conventionally, controllers for DC/DC converters have relied on analog circuit techniques for implementation. While analog based systems have proven successful, several reasons make digital control attractive. Digital control allows for the implementation of more functional control schemes. Digital circuits are potentially less susceptible to noise and parameter variations. With the explosion of cheap computing power, and availability of advanced integrated circuit design and synthesis tools, a digital controller design can be ported to new integrated circuit technology generations with little additional effort. Current trends in microprocessor designs lead toward decreasing supply voltages and increasing current demands. Future microprocessors are projected to require between 30-60 Amps of static current and impose di/dt requirements on the power supply in the order of 5 A/ns. In this paper, we focus on the design of a digital controller for an interleaved DC/DC buck converter to supply power for microprocessor loads. Digital logic makes the generation of identical, but delayed, gate drive signals for the various phases of the interleaved converter simple.

Design of microfabricated transformers and inductors for high-frequency power conversion

Transformers and inductors fabricated with micron-scale magnetic-alloy and copper thin films are designed for high-frequency power conversion applications. Fine patterning produced by photolithography reduces eddy current losses, thus enabling very high power densities. Calculated design graphs and design examples for 10 MHz transformers are presented.