Gabriele Ciarpi

Design and Experimental Measurement of EMI Reduction Techniques for Integrated Switching DC/DC Converters

This paper presents the design and verification of electromagnetic interference (EMI) reduction techniques for switching dc/dc converters. A 48-V dc/dc converter for electric/hybrid cars is considered as an application case study. An EMI filter with a very low inductor value is designed to reduce the overvoltage issues. The proposed design procedure takes into account the converter impedance and the cable model in order to avoid the state-of-the-art tendency of oversizing the filter components. Thus, the filter implementation is simplified and its EMI reduction capability is kept unaltered. Measurements of near EM field in anechoic room show that, using a low switching frequency for the dc/dc converter, the EMI problem is shifted from radiated to conducted emissions. A SKIP-mode modulation technique is implemented to control the converter output and also to reduce the conducted EMI, as shown by CAD simulations and experimental measurements. In addition, a soft-start technique, which reduces by three times the currents’ spikes, is integrated into the dc/dc converter to minimize the EMI at the car’s starting.

Improving electromagnetic compatibility of integrated switching converters for hybrid/electric vehicles

Practical techniques to reduce electromagnetic interference (EMI) for integrated DC/DC converters are discussed in the paper. As application case study a 48 V DC/DC converter for electric/hybrid cars is considered. Firstly, an EMI filter with very low values of inductor is designed to facilitate its integration and to reduce the overvoltage issues. Experimental results prove that the proposed EMI filter design procedure, taking into account the source and terminal impedance, avoids the state-of-art tendency of over-designing EMI filter components. Then, EMI is reduced further by integrating in the DC/DC converter a soft-start technique, which mitigates EMI issues reducing by 3 times the currents spikes at the cars power on.

IC Design and Measurement of an Inductorless 48 V DC/DC Converter in Low-Cost CMOS Technology Facing Harsh Environments

With reference to 48-V systems, used in electric and hybrid vehicles and for telecom and networking power supply, this paper presents the circuit/transistor-level design, implementation, and test of an inductorless dc/dc converter. Its architecture is a cascade of three switched-capacitor converters with step-up/down capabilities plus linear converters, working in parallel at the end of the cascade. It provides multiple regulated voltages, which are isolated from input failures. The design also includes on-chip control unit and a serial interface toward an external host. Experimental tests carried out on the chip, fabricated in 0.35-

A high-speed driver for silicon photonics Mach-Zehnder modulator for high data-rate transfer of particle collision images in high-energy physics and in medical physics

\mu \text{m}

Electrical and electromagnetic measurements of an inductorless DC/DC converter

CMOS technology, proves that the design is suitable to face harsh operating environments, including the 48-V automotive one. Compared with the state-of-art, the proposed design stands for its wide input voltage regulation range, load/line regulation, power supply rejection ratio, and low electromagnetic interference emissions.

Universal and inductorless DC/DC converter for multi-output power supplies in sensor and actuator networks

All the High Energy Physics (HEP) experiments in modern accelerators can be seen as real-time imaging devices whose main target is the reconstruction of the trajectories of the particles generated directly in the beam interactions - e.g. interaction between proton-proton beams in the Large Hadron collider (LHC) at CERN – or in the decay of other particles. Silicon imaging sensors are segmented in pixel arrays (50 μm x 50 μm) and they are bonded to custom Front-End (FE) ASICs. The data rate generated amounts to hundreds of Gbps for each FE ASIC. Similar scenario characterized the array of detectors in nuclear medicine systems such as PET (Positron Emission Tomography) scanners. Within this scenario, the paper presents the L1-trigger processor, which acts as an image compression processor with a compression factor 40:1. The paper also presents the silicon photonic Mach Zehnder Modulator with the relevant high-speed driver to transfer the multi-Gbps data rate with a tolerance to radiation damage up to 1 Grad.

Analysis and Simulations of mmW Transceiver for System-in-Package Communications.

The experimental characterization of a new DC/DC converter for high voltage, up to 60 V, automotive applications is proposed in the paper. A summary description of the inductorless converter is showed to understand the measurement results. The bare die is used to avoid the effects of the package on the measures. The tests are focused on Electromagnetic Interference (EMI) highlighting the low values of the proposed converter solution, which is born for a totally integration in a System in Package (SiP) with a 3D technology. The electric tests show the performance of the DC/DC converter, the parts of the design to be improved, and the difference between CAD simulations and experimental measurements.

System-level modelling/analysis and LNA design in low-cost automotive technology of a V2X wireless transceiver

This work proposes a universal and inductorless DC/DC converter that can be used for a wide input range, from few V to 60 V, to regulate output voltages from 5 V down to 1 V in Sensor and Actuator Network nodes. The proposed converter has been developed within the Athenis3D European project. It is composed by a cascade of multiple switching capacitor stages, with a proper skip-mode control to implement both step-down and step-up converting ratios, thus regulating all input sources to a voltage of about 6 V. These switching stages are further cascaded with linear regulators, which can provide stable output voltages down to 1 V. The multi-output regulator has been realized as a single-chip in a low-cost 0.35 μm CMOS technology. It is available as a naked die or in a ceramic package. The only needed external components are surface mount capacitors, which can be integrated on top of the naked chip die, creating a 3D structure, using trench capacitors embedded in a passive interposing layer. This way the size of the power management unit is further minimized. An advantage of the proposed converter is that it isn’t optimized for a particular input voltage, therefore it can be used with no constant input power, like power harvesting systems (e.g. solar cells, wind and water turbines) and very disturbed power supplies.

Failure Analysis of Plastic Packages for Low-Power ICs

This paper uses an analytical approach to provide a performance analysis of a millimeter-wave short-range link for System in Package (SiP) applications. Thanks to an analytical modeling of the real Si-integrated antenna, an easy-to-use expression of the Intersymbol Interference (ISI) is derived and used to estimate the performance of the communication system. The performance of two different low-complexity binary constellations (bipolar and unipolar symbols) and four different pulse shapes, i.e., No-Return-to-Zero (NRZ), Return-to-Zero (RZ), Manchester (MAN) and Root-Raised-Cosine (RRC) are compared to highlight the different performance in relation to the tight area and power constraints.

Testing of DC/DC Converters for 48 V Electric Vehicles

The paper presents the transistor-level design, using Keysight ADS environment, of a Low Noise Amplifier (LNA), the key block of wireless transceivers in automotive V2X (vehicle to everything) applications. A system-level exploration of the transceiver, using an end-to-end Simulink model annotated bottom up with transistor-level circuit performance, is also presented. The system model allows analyzing the impact of LNA noise figure, gain and non-linearity on the error vector magnitude of the modem constellation. To this aim, a multi-carrier modulation scheme with QPSK bit-loading is used. To meet the stringent cost requirements of the large volume automotive market, a low-cost 0.35 μm CMOS technology is used. The technology is compliant with an automotive qualified flow and allows for the system-on-chip design of V2X transceivers. The achieved performance, although limited by the low Q value (<10) of the inductors available in the technology library, still ensure that the LNA is compliant with the physical layer, around 5.8–5.9 GHz, of IEEE 802.11p, CEN DRSC and ETSl 1TS-G5 standards.