Ganesh Srinivasan
Texas Instruments
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Publication
Featured researches published by Ganesh Srinivasan.
IEEE Design & Test of Computers | 2010
Vishwanath Natarajan; Shreyas Sen; Aritra Banerjee; Abhijit Chatterjee; Ganesh Srinivasan; Friedrich Taenzler
Tuning knobs are becoming common in analog and RF devices for postsilicon calibration for variation tolerance and compensation. This article presents a low-cost, hardware-iterative technique based on a steepest-descent-based gradient search algorithm and demonstrates its utility in performance tuning of a 2.4-GHz transmitter system.
international conference on vlsi design | 2011
Aritra Banerjee; Vishwanath Natarajan; Shreyas Sen; Abhijit Chatterjee; Ganesh Srinivasan; Soumendu Bhattacharya
Test time and test complexity reduction has become a critical challenge in modern RF testing. Prior “alternative” test methods have achieved fast testing at the cost of using supervised learning algorithms that require “training”. In contrast, behavioral model parameter estimation based test methods require the use of accurate models but no “training” is necessary, reducing test deployment costs. In this work, a new test generation approach is proposed that allows behavioral model parameter estimation to be performed from a single optimized OFDM data frame. A genetic multi-tone test stimulus optimization algorithm is developed to maximize the accuracy with which a nonlinear solver can determine RF transceiver model parameters from raw downconverted test response data. The transceiver model proposed is the most comprehensive to date and includes AM-PM distortion and 5th order nonlinearity effects. Simulation results show that using the optimized multitone test stimulus, all the model parameters can be computed accurately using a single data acquisition (4X-5X faster than prior parameter estimation techniques and comparable to alternative test times). Data from an experiment performed on a hardware prototype validates the proposed concept.
international test conference | 2008
Ganesh Srinivasan; Hui-Chuan Chao; Friedrich Taenzler
Present day needs of RF IC manufactures for EVM tests in production testing from engineering and customer perspectives strongly demands massive parallel testing. This paper presents an industry development and deployment approach of octal-site, OFDM based broadband EVM tests on low-cost ATE platforms. Results obtained from an octal-site EVM solution for a WLAN transceiver is presented to validate the approach. The effects of repeatability and isolation of these tests in multi-site configuration are discussed. Also, a study of test time and test cost is presented to justify deployment of these tests in production.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2012
Vishwanath Natarajan; Hyun Woo Choi; Aritra Banerjee; Shreyas Sen; Abhijit Chatterjee; Ganesh Srinivasan; Freidrich Taenzler; Soumendu Bhattacharya
Error-vector-magnitude (EVM) is a system level specification that determines the overall modulation quality and exhibits strong correlation to the inherent nonidealities of a radio frequency (RF) system. In production testing, EVM tests incur significant cost due to the large number of symbols required to ensure test quality. In our approach, EVM is decomposed into its deterministic (due to static impairments: IQ mismatch, gain, AM-AM and AM-PM) and random (due to dynamic impairments: VCO phase noise, thermal noise) components. The static impairments are computed from the device under test (DUT) response to an optimized multitone test input. The dynamic impairments are computed using signal processing algorithms from the DUT test response to the same test input. The EVM of the RF system is then derived from the computed static and dynamic impairments, respectively. Experimental results show that significant reduction in test time is possible without compromising EVM test quality.
international test conference | 2008
Erkan Acar; Sule Ozev; Ganesh Srinivasan; Friedrich Taenzler
Characterization of RF ICs based on their error vector magnitude (EVM) is gaining a lot of attention in the industry. In order to deliver this specification at a reasonable cost, the input test signal and the analysis techniques have to be optimized such that EVM testing can provide a robust pass/fail decision while utilizing a reasonable amount of tester resources. In this paper, we propose techniques to optimize EVM testing, both from input signal generation and from output analysis perspectives. Our goal is to achieve both efficient and reliable test approaches for WLAN (Wireless Local Area Networks) circuits.
asian test symposium | 2010
Shyam Kumar Devarakond; Shreyas Sen; Vishwanath Natarajan; Aritra Banerjee; Hyun Woo Choi; Ganesh Srinivasan; Abhijit Chatterjee
In this paper, a novel built-in tuning technique to compensate for variability induced imperfections in RF subsystems is proposed. The test stimulus is obtained from a filtered digital pattern and the RF response is down-converted using an envelope detector. The resulting signal is mapped to a digital signature, such that the Hamming Distance between the observed and the golden signature represents the degree by which the circuit specifications (Gain, IIP3, EVM, etc) differ from the ideal. A hardware driven algorithm is used to minimize this Hamming Distance to concurrently optimize (tune) multiple RF specifications. As opposed to prior research, the method does not require the use of an on-chip digital signal processor and uses minimal on-chip hardware. Results obtained on a 2.4 GHz transmitter subsystem show significant impact of tuning on device specifications.
Journal of Electronic Testing | 2011
Sukeshwar Kannan; Bruce C. Kim; Ganesh Srinivasan; Friedrich Taenzlar; Richard L. Antley; Craig Force
This paper provides development of an RF circuit software tool that automatically generates diagnostic programs for device interface boards. The diagnostic tool utilizes novel techniques to differentiate faulty RF circuits embedded in printed circuit boards. We present RF circuit diagnostic techniques using power sensors and multi-tone dither testing, which we integrated into the diagnostic software tool that we developed. The diagnostic tool provides user-transparent pseudocodes with high fault coverage and significantly decreases time to market.
asian test symposium | 2007
Ganesh Srinivasan; Abhijit Chatterjee; Vishwanath Natarajan
At the present time, coordinated EDA tools for RF/mixed-signal pin test do not exist. In this paper, a CAD tool for efficient production testing of high- performance RF systems using low-cost baseband ATE is presented The CAD tool consists of a custom developed genetic ATPG for spectral (Fourier spectrum) signature-based alternate (to full specification-based tests) test of RF systems and involves co-simulation of scalable behavioral-level models of the RF System-Under-Test, baseband ATE test instrumentation, loadboard resources, and DfT resources for fast test vector optimization/generation. The CAD tool also enables the evaluation of various low-cost ATE architectures on the impact of the generated tests to provide a cost-effective solution.
international test conference | 2010
Sukeshwar Kannan; Bruce C. Kim; Ganesh Srinivasan; Friedrich Taenzlar; Richard L. Antley; Craig Force; Falah Mohammed
This paper provides development of an RF circuit software tool that generates diagnostic programs automatically for device interface boards. The diagnostic tool utilizes novel techniques to differentiate faulty RF circuits embedded in printed circuit boards. The diagnostic tool provides user-transparent pseudocodes with high fault coverage and significantly decreases time to market.
symposium/workshop on electronic design, test and applications | 2004
Soumendu Bhattacharya; Ganesh Srinivasan; Sasikumar Cherubal; Abhijit Chatterjee