Gary D. Hachtel

Algebraic decision diagrams and their applications

In this paper we present theory and experiments on the algebraic decision diagrams (ADDs). These diagrams extend BDDs by allowing values from an arbitrary finite domain to be associated with the terminal nodes. We present a treatment founded in Boolean algebras and discuss algorithms and results in applications like matrix multiplication and shortest path algorithms. Furthermore, we outline possible applications of ADDs to logic synthesis, formal verification, and testing of digital systems.

VIS: A System for Verification and Synthesis

ion Manual abstraction can be performed by giving a file containing the names of variables to abstract. For each variable appearing in the file, a new primary input node is created to drive all the nodes that were previously driven by the variable. Abstracting a net effectively allows it to take any value in its range, at every clock cycle. Fair CTL model checking and language emptiness check VIS performs fair CTL model checking under Buchi fairness constraints. In addition, VIS can perform language emptiness checking by model checking the formula EG true. The language of a design is given by sequences over the set of reachable states that do not violate the fairness constraint. The language emptiness check can be used to perform language containment by expressing the set of bad behaviors as another component of the system. If model checking or language emptiness fail, VIS reports the failure with a counterexample, (i.e., behavior seen in the system that does not satisfy the property for model checking, or valid behavior seen in the system for language emptiness). This is called the “debug” trace. Debug traces list a set of states that are on a path to a fair cycle and fail the CTL formula. Equivalence checking VIS provides the capability to check the combinational equivalence of two designs. An important usage of combinational equivalence is to provide a sanity check when re-synthesizing portions of a network. VIS also provides the capability to test the sequential equivalence of two designs. Sequential verification is done by building the product finite state machine, and checking whether a state where the values of two corresponding outputs differ, can be reached from the set of initial states of the product machine. If this happens, a debug trace is provided. Both combinational and sequential verification are implemented using BDD-based routines. Simulation VIS also provides traditionaldesign verification in the form of a cycle-based simulator that uses BDD techniques. Since VIS performs both formal verification and simulation using the same data structures, consistency between them is ensured. VIS can generate random input patterns or accept user-specified input patterns. Any subtree of the specified hierarchy may be simulated.

Multilevel logic synthesis

A survey of logic synthesis techniques for multilevel combinational logic is presented. The goal is to provide more in-depth background and perspective for people interested in pursuing or assessing some of the topics in this emerging field. Introductions, capsule summaries, and, in some cases, detailed analysis of the synthesis methods that have become established as practically significant are provided. Also included are some methods that have theoretical interest and potential for future impact. The discussion covers notation and definitions, representation of the network and nodes, logic decomposition/restructuring, logic optimization/minimization, logic synthesis and testing, and technology mapping. >

The Sparse Tableau Approach to Network Analysis and Design

The tableau approach to automated network design optimization via implicit, variable order, variable time-step integration, and adjoint sensitivity computation is described. In this approach, the only matrix operation required is that of repeatedly solving linear algebraic equations of fixed sparsity structure. Required partial derivatives and numerical integration is done at the branch level leading to a simple input language, complete generality and maximum sparsity of the characteristic coefficient matrix. The bulk of computation and program complexity is thus located in the sparse matrix routines; described herein are the routines OPTORD and 1-2-3 GNSO. These routines account for variability type of the matrix elements in producing a machine code for solution of Ax=b in nested iterations for which a weighted sum of total operations count and round-off error incurred in the optimization is minimized.

A survey of optimization techniques for integrated-circuit design

We survey contemporary optimization techniques and relate these to optimization problems which arise in the design of integrated circuits. Theory, algorithms and programs are reviewed, and an assessment is made of the impact optimization has had and will have on integrated-circuit design. Integrated circuits are characterized by complex tradeoffs between multiple nonlinear objectives with multiple nonlinear and sometimes nonconvex constraints. Function and gradient evaluations require the solution of very large sets of nonlinear differential equations, consequently they are inaccurate and extremely expensive. Furthermore, the partmeters to be optimized are subject to inherent statistical fluctuations. We focus on those multiobjective constrained optimization techniques which are appropriate to this environment.

Multi-level logic minimization using implicit don't cares

An approach is described for the minimization of multilevel logic circuits. A multilevel representation of a block of combinational logic is defined, called a Boolean network. A procedure is then proposed, called ESPRESSOMLD, to transform a given Boolean network into a prime, irredundant, and R-minimal form. This procedure rests on the extension of the notions of primality and irredundancy, previously used only for two-level logic minimization, to combinational multilevel logic circuits. The authors introduce the concept of R-minimality, which implies minimality with respect to cube reshaping, and demonstrate the crucial role played by this concept in multilevel minimization. Theorems are given that prove the correctness of the proposed procedure. Finally, it is shown that prime and irredundant multilevel logic circuits are 100% testable for input and output single-stuck faults, and that these tests are provided as a byproduct of the minimization. >

A new efficient algorithm for solving differential-algebraic systems using implicit backward differentiation formulas

The backward differentiation formulas (BDF), of order 1 up to 6 are described as they are applied to a system of differential algebraic equations. The BDF method is compared to the Gear-Nordsieck method, and is shown to be more efficient, more flexible in the selection of variables for prediction and error control, and more stable under conditions of rapidly varying Δt. For Δt fixed, the two methods are equivalent but for Δt varying they are not equivalent. Numerical experiments are described which demonstrate that the Gear-Nordsieck and BDF methods are unstable under rapidly changing Δt, but BDF is more stable. The two methods are distinguished numerically by identifying the modification of the Gear-Nordsieck method which makes it equivalent to the BDF method even if Δt changes. The computational advantage of using backward differences Δx, instead of the Nordsieck vector, for storing the backward-time information is treated by giving an operations count which shows the BDF using backward Δxs is more efficient. Finally, additional numerical evidence is given to support the use of variable order methods and the use of higher order methods.

Algebric Decision Diagrams and Their Applications

In this paper we present theory and experimental results on Algebraic Decision Diagrams. These diagrams extend BDDs by allowing values from an arbitrary finite domain to be associated with the terminal nodes of the diagram. We present a treatment founded in Boolean algebras and discuss algorithms and results in several areas of application: Matrix multiplication, shortest path algorithms, and direct methods for numerical linear algebra. Although we report an essentially negative result for Gaussian elimination per se, we propose a modified form of ADDs which appears to circumvent the difficulties in some cases. We discuss the relevance of our findings and point to directions for future work.

A new algorithm for statistical circuit design based on quasi-Newton methods and function splitting

A new algorithm for the zero tolerance, fixed tolerance, and variable tolerance problems of optimal circuit design is presented. It is a minimax quasi-Newton method based on an algorithm of Powell for nonlinear constrained optimization. The new algorithm employs a new exact penalty function and a new efficient semidefinite quadratic program to determine the quasi-Newton step. In addition we use for the tolerance problems a method called function splitting to regularize the minimax problem. The algorithm is very efficient and examples are given which exhibit its super-linear convergence on regular and nonregular problems from the literature and on a practical worst-case circuit design problem.

Markovian analysis of large finite state machines

Regarding finite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal verification problems. In this paper we present symbolic algorithms to compute the steady-state probabilities for very large finite state machines (up to 10/sup 27/ states). These algorithms, based on Algebraic Decision Diagrams (ADDs)-an extension of BDDs that allows arbitrary values to be associated with the terminal nodes of the diagrams-determine the steady-state probabilities by regarding finite state machines as homogeneous, discrete-parameter Markov chains with finite state spaces, and by solving the corresponding Chapman-Kolmogorov equations. We first consider finite state machines with state graphs composed of a single terminal strongly connected component; for this type of system we have implemented two solution techniques: One is based on the Gauss-Jacobi iteration, the other one is based on simple matrix multiplication. Then we extend our treatment to the most general case of systems which can be modelled as finite state machines with arbitrary transition structures; here our approach exploits structural information to decompose and simplify the state graph of the machine. We report experimental results obtained for problems on which traditional methods fail.