Gary M. Dolny

Enhanced CMOS for analog-digital power IC applications

Elementary process additions to 2-3-µm polygate CMOS provide enhanced high-voltage MOSFETs and broadband complimentary bipolars. This allows monolithic integration of a modern logic family and quality analog function with high-voltage high-current buffers and drivers. The technology is suitable for data conversion, telecommunication, analog switch, and industrial IC applications where low-voltage digital and analog control circuitry must be interfaced to high-voltage high-current outputs.

The effect of temperature on lateral DMOS transistors in a power IC technology

A systematic study of the effects of elevated temperature on the lateral DMOS power transistors is presented. A comprehensive experimental characterization of the important LDMOS electrical parameters over the temperature range 30-300 degrees C is reported. Simple, analytic models are used to explain the observed behavior and to offer physical insight into the effects of temperature on LDMOS performance. A novel test structure is utilized to unambiguously separate channel-region effects from drift-region effects. Using this structure it is shown that the LDMOS channel mobility follows a T/sup -2.5/ temperature dependence, which is significantly more severe than the T/sup -1.5/ dependence of conventional CMOS channel mobility. Other key temperature-dependent parameters include the threshold voltage, on-state resistance, saturation current, breakdown voltage, and leakage current, which is shown to place a fundamental limitation on the high-temperature operation of the LDMOS transistor. >

Silicon-on-insulator approach for power IC's integrating vertical DMOS and polycrystalline silicon CMOS thin-film transistors

A novel approach for the monolithic integration of low-voltage logic and analog control circuits with vertical-current flow power transistors is described. This is achieved by fabricating a CMOS device family, using polycrystalline-silicon thin-film transistors (TFTs), on the field oxide of a single-crystal power device. Parasitic interactions between the control and power devices are eliminated in a simple, inexpensive, and easily manufacturable process. The technology is capable of supporting both MOS and bipolar power devices and the presence of the TFT circuits places no restriction on the maximum voltage or current of the power device. The TFTs exhibit good electrical characteristics and the power devices are not compromised by the addition of the TFT control circuits. This concept is demonstrated by the fabrication of a vertical DMOS power transistor with >100-V, >45-A capability, monolithically integrated with current-limiting and temperature-limiting functions.<<ETX>>

Characterization and modeling of the temperature dependence of lateral DMOS transistors for high-temperature applications of power ICs

A comprehensive experimental characterization of lateral DMOS electrical parameters over the temperature range 30-300 degrees C is presented. Simple analytic models are used to explain the observed behavior and to offer physical insight into the effects of temperature on LDMOS performance. A novel test structure is utilized to unambiguously separate channel-region effects from drift-region effects. It is shown that the LDMOS channel mobility follows a T/sup -2.5/ temperature dependence, which is significantly more severe than the T/sup -1.5/ dependence of conventional CMOS channel mobility. Other key temperature-dependent parameters include the threshold voltage, on-state resistance, saturation current, breakdown voltage, and leakage current, which places a fundamental limitation on the high-temperature operation of the LDMOS transistor.<<ETX>>

CMOS/DMOS power IC technology on thin-film SOI substrates

A power IC technology integrating low-voltage CMOS with high-voltage current, high-voltage DMOS on a thin-film SOI substrate has been successfully demonstrated. The low-voltage CMOS exhibit good electrical characteristics and the power DMOS can supply more than 3 A of current and is capable of withstanding 120 V.<<ETX>>

The application of silicon-on-insulator (SOI) technology for the fabrication of fully scanned active matrix flat panel displays

SOI technology is presently being used for the fabrication of both liquid crystal displays (LCDs) and electroluminescent (EL) displays. It has unique advantages for the fabrication of flat panel displays such as the production of devices with high performance and high breakdown voltage. It is the object of this paper to review the process technologies used in the fabrication of these displays and also to show the latest developments in these technologies.

High-resolution AC thin-film electroluminescence using active matrix on Si substrate

Active matrix electroluminescent (AMEL) devices are fabricated using circuitry built on the thin-film single crystal silicon on insulator wafers. A 128 X 128 matrix with 24micrometers pixel pitch (1000 lines/inch) is fabricated with higher than 80% fill factor showing initial brightness of above 500fL and high contrast ratios (>100:1). These devices demonstrated the successful combination of active circuitry fabricated using conventional IC processing with standard electroluminescent processing. This AMEL approach provides the potential for head-mounted displays with a very small profile and high efficiency.

High-density active matrix electroluminescent display using single-crystal silicon-on-insulator high-voltage IC technology

A novel, high-density, active-matrix, electroluminescent display has been fabricated using single-crystal silicon-on-insulator technology. This new approach offers many advantages including high brightness, superior speed, low power dissipation, high pixel density, high resolution, good gray-scale performance, and improved reliability.<<ETX>>

Polycrystalline silicon thin-film CMOS technology: the poor man's SOI

The authors discuss the electrical characteristics of thin film polycrystalline silicon transistors and their various uses. The first major application of polysilicon transistors was in the fabrication of active matrix liquid crystal displays. Over 40000 devices are fabricated on a four inch glass wafer and are used to make write only dynamic memory type full wafer arrays. The second major application of polysilicon transistors is as a replacement for the polysilicon load resistor in static memories. Future applications include circuits where both bulk silicon transistors and low performance silicon-on-insulator polysilicon transistors are used in the same integrated circuit. Typical of these applications are arrays where different substrate biases are needed and where junction isolation is insufficient for the application.<<ETX>>