A.C. Ipri

The impact of the transient response of organic light emitting diodes on the design of active matrix OLED displays

Much of the organic light emitting diode (OLED) characterization published to date addresses the high current regime encountered in the operation of passively addressed displays. Higher efficiency and brightness can be obtained by driving with an active matrix, but the lower instantaneous pixel currents place the OLEDs in a completely different operating mode. Results at these low current levels are presented and their impact on active matrix display design is discussed.

4.2: Design ofanlmproved Pixel fora Polysilicon Active‐Matrix Organic LED Display

A polysilicon transistor based active matrix organic light emitting diode (AMOLED) pixel with high pixel to pixel luminance uniformity is reported. The new pixel powers the OLEDS with small constant currents to ensure consistent brightness and extended life. Excellent pixel to pixel current drive uniformity is obtained despite the threshold voltage variation inherent in polysilicon transistors. considerations in the design for high information content displays are discussed.

A study of hydrogen passivation of grain boundaries in polysilicon thin-film transistors

A series of different annealing temperatures and gases leads to steadily improving performance, i.e. lower leakage current, for five wafers containing both n-channel and p-channel transistors. Initially the n-channel and p-channel leakage currents improve proportionally for the same passivation treatment. For the best wafer, however, the p-channel leakage current improves by a factor of forty more than the n-channel leakage current. Measurement of leakage current activation energy shows that for most wafers, the activation energy is close to one half the silicon bandgap, but for the optimum wafer the activation energy for p-channel leakage current is higher by 0.1 eV. An interpretation is given in terms of the density of defect states in polysilicon. Initially passivation reduces the number of defect states near midgap, but for the optimum passivation the grain-boundary Fermi level shifts by 0.1 eV toward the conduction band, leading to a much lower leakage current for p-channel versus n-channel transistors. >

A Polysilicon Active Matrix Organic Light Emitting Diode Display with Integrated Drivers

The design of an active matrix organic light emitting diode (AMOLED) display using a polysilicon thin film transistor pixel is described. Characteristics of the OLED response in the low current regime are described and their impact on the design of integrated driver circuitry is discussed. Integrated data and select scanners which generate the signals necessary for data capture and pixel calibration are presented.

MONO/POLY technology for fabricating low-capacitance CMOS integrated circuits

A process for the fabrication of CMOS transistors with oxide-isolated source-drain regions that are coplanar with the device channel region is described. The process uses the epitaxial lateral overgrowth technique to selectively grow single-crystal silicon from seed regions that will become the transistor channel regions. The source-drain regions are polycrystalline silicon and are deposited following the selective growth. n- and p-channel device characteristics are presented. >

The effect of 1300-1380 degrees C anneal temperatures and material contamination on the characteristics of CMOS/SIMOX devices

The characteristics of CMOS transistors fabrication on silicon implanted with oxygen (SIMOX) materials were measured as a function of the silicon superficial layer contamination levels. In addition, postimplant anneal temperatures of 1300 degrees C, 1350 degrees C, and 1380 degrees C were examined. It is found that the transistor leakage currents as well as the integrity of the gate oxide and implanted SIMOX oxide are functions of the carbon content in the starting material. Leakage currents below 1.0*10/sup -12/ A/ mu m of channel width have been measured when the carbon concentration is reduced to 2*10/sup 18//cm/sup 2/. In addition, the integrity of the transistor gate dielectric, SIMOX implanted oxide, and oxygen precipitate density are seen to be a function of the postimplant anneal temperature. A gate dielectric breakdown field of 10 MV/cm has been achieved when the postimplant temperature is increased to 1380 degrees C.<<ETX>>

Submicrometer polysilicon gate CMOS/SOS technology

A process is described for the fabrication of CMOS/SOS submicrometer devices and integrated circuits. The process utilizes the lateral diffusion of boron into polycrystalline silicon and a subsequent anisotropic etchant to define the narrow poly gates. Devices with channel lengths as small as 0.3 µm have been fabricated and characterized. Both avalanche and tunnel injection of carriers into the gate dielectric have been measured and both can have an impact on the limit of voltage operation. At present, these mechanisms appear to place an upper limit of about 8 V on the operating voltage of dynamic circuits containing 0.5- µm channel length devices. The propagation delay of 0.5-µm channel length CMOS/SOS inverters is about 200 ps at 5 V and dynamic binary counters will operate with a maximum input frequency of 550 MHz and 8 V while dissipating 130 mW.

Silicon-on-insulator approach for power IC's integrating vertical DMOS and polycrystalline silicon CMOS thin-film transistors

A novel approach for the monolithic integration of low-voltage logic and analog control circuits with vertical-current flow power transistors is described. This is achieved by fabricating a CMOS device family, using polycrystalline-silicon thin-film transistors (TFTs), on the field oxide of a single-crystal power device. Parasitic interactions between the control and power devices are eliminated in a simple, inexpensive, and easily manufacturable process. The technology is capable of supporting both MOS and bipolar power devices and the presence of the TFT circuits places no restriction on the maximum voltage or current of the power device. The TFTs exhibit good electrical characteristics and the power devices are not compromised by the addition of the TFT control circuits. This concept is demonstrated by the fabrication of a vertical DMOS power transistor with >100-V, >45-A capability, monolithically integrated with current-limiting and temperature-limiting functions.<<ETX>>

Polysilicon transistors fabricated on plasma-deposited amorphous silicon

P-channel MOS transistors were fabricated on plasma-enhanced chemical-vapor deposited (PECVD) amorphous silicon films. The films were deposited at temperatures of 425, 450, and 475 degrees C and crystallized at 600 degrees C. Film thicknesses were between 50 and 250 nm. Transistors were also fabricated on 150-nm-thick low-pressure chemical-vapor-deposited (LPCVD) amorphous silicon films deposited at 560 degrees C. A comparison of device characteristics using 150-nm-thick PECVD and LPCVD films shows that the PECVD films deposited at 425 degrees C produced devices with a factor-of-two-higher hole mobility, a factor-of-1.5-lower subthreshold slope, and a factor-of-3.5-higher on-off current ratio. For all film thicknesses tested there was an increase in the hole mobility and on-off current ratio as the PECVD film temperature was decreased. >

Active matrix organic light emitting diode pixel design using polysilicon thin film transistors

Organic light emitting diodes (OLEDs) are presently of great interest due to their potential application in high efficiency displays. However, as the number of pixels in a passively addressed display increases, the time available to drive each pixel decreases, the peak pixel brightness increases and the OLED drive current increases. Thin film transistors made with polysilicon can be used to generate a constant current source at each pixel. Each pixel is programmed to provide a constant current throughout the entire frame time, eliminating the high currents encountered in the passive matrix approach. However, polysilicon thin film transistors vary widely in their initial output characteristics due to the nature of the polysilicon crystal growth. A description of some of the important considerations in the design of such an AMOLED pixel and results on improved pixel designs are presented.