Fu-Lung Hsueh

Large format backside illuminated CCD imager for space surveillance

The key features and performance data of a 2560/spl times/1960-pixel split-frame-transfer imager developed for space surveillance is described. The eight-port, backside illuminated charge coupled device (CCD) features 24 /spl mu/m pixels with buried blooming drains to provide 100% optical fill-factor and >1000/spl times/ overload protection from blooming. The imaging and storage registers are strapped with metal to achieve vertical transfer clock rates >400 KHz for the 61 mm long imaging register gates. The 5 million pixel array operates at 2.7 frames/s. The monolithic focal plane includes a 32/spl times/32-pixel frame-transfer imager, with a single output, which operates at 1000 frames/s. The output ports employ a floating diffusion output circuit with responsivity of 10.5 /spl mu/V/e and noise of 7e RMS at a 1.25 MHz clock rate. The imager is photocomposed employing a combination of 5/spl times/ and 1/spl times/ lithography. The photocomposition approach is described.

34.1: 100‐MHZ Active‐Matrix Electroluminescent Displays

AMEL displays with 12μm×12μm pixels in a 1280×1024 array have been built and operated at 100MHz input data rates. The display accepts data at 100MHz on each of the 8 parallel inputs to support a total pixel data rate of over 800 megabits per second. These high data rates were achieved using a 1.2μm effective channel length body-tied crystalline silicon TFTs fabricated on SOI. This is the highest data rate reported for any flat panel display.

0.7-in. 1280x1024 active-matrix electroluminescent display using a 12-μm pixel structure

Using a 12 by 12 micrometers pixel cell and 1.0 micrometers deign rules, a 0.7-inch diagonal 1280 by 1024 active matrix electroluminescent (AMEL) display has been designed and demonstrated using a silicon-on-insulator based CMOS technology. The display accepts data at 100 MHz via eight data inputs and provides five bits of gray scale. A total of 24 connections are used for all display functions. Architecture, theory of operation, and detailed specification for this new 2000 line-per-inch display will be discussed. The display is the same size as Planars previously developed AMEL 640 by 480 arrays, thus providing over tour times the number of pixels in the same footprints as the prior design. The display provides workstation resolution in an extremely compact format and offers the same environmental robustness and optical performance as previously demonstrated in 1000 line-per-inch AMEL displays.

Radiation-hardened backside-illuminated 512 x 512 charge-coupled device

A four-port 512 X 512 charge coupled device (CCD) imager hardened against proton displacement damage and total dose degradation has been fabricated and tested. The device is based upon an established thinned, backside illuminated, triple polysilicon, buried channel CCD process technology. The technology includes buried blooming drains. A three step approach has been taken to hardening the device. The first phase addressed hardening against proton displacement damage. The second phase addressed hardening against both proton displacement damage and total dose degradation. The third phase addresses final optimization of the design. Test results from the first and second phase efforts are presented. Plans for the third phase are discussed.

The application of silicon-on-insulator (SOI) technology for the fabrication of fully scanned active matrix flat panel displays

SOI technology is presently being used for the fabrication of both liquid crystal displays (LCDs) and electroluminescent (EL) displays. It has unique advantages for the fabrication of flat panel displays such as the production of devices with high performance and high breakdown voltage. It is the object of this paper to review the process technologies used in the fabrication of these displays and also to show the latest developments in these technologies.

Performance of an extended dynamic range, time delay integration charge coupled device (XDR TDI CCD) for high-intrascene dynamic range scanning

Many applications, such as industrial inspection and overhead reconnaissance benefit from line scanning architectures where time delay integration (TDI) significantly improves sensitivity. CCDs are particularly well suited to the TDI architecture since charge is transferred virtually noiselessly down the column. Sarnoffs TDI CCDs have demonstrated extremely high speeds where a 7200 x 64, 8 um pixel device with 120 output ports demonstrated a vertical line transfer rate greater than 800 kHz. The most recent addition to Sarnoffs TDI technology is the implementation of extended dynamic range (XDR) in high speed, back illuminated TDI CCDs. The optical, intrascene dynamic range can be adjusted in the design of the imager with measured dynamic ranges exceeding 2,000,000:1 with no degradation in low light performance. The device provides a piecewise linear response to light where multiple slopes and break points can be set during the CCD design. A description of the device architecture and measured results from fabricated XDR TDI CCDs are presented.

Backside-illuminated 6.6-μm pixel video-rate CCDs for scientific imaging applications

A family of backside illuminated CCD imagers with 6.6 micrometers pixels has been developed. The imagers feature full 12 bit (> 4,000:1) dynamic range with measured noise floor of < 10 e RMS at 5 MHz clock rates, and measured full well capacity of > 50,000 e. The modulation transfer function performance is excellent, with measured MTF at Nyquist of 46% for 500 nm illumination. Three device types have been developed. The first device is a 1 K X 1 K full frame device with a single output port, which can be run as a 1 K X 512 frame transfer device. The second device is a 512 X 512 frame transfer device with a single output port. The third device is a 512 X 512 split frame transfer device with four output ports. All feature the high quantum efficiency afforded by backside illumination.

High-resolution AC thin-film electroluminescence using active matrix on Si substrate

Active matrix electroluminescent (AMEL) devices are fabricated using circuitry built on the thin-film single crystal silicon on insulator wafers. A 128 X 128 matrix with 24micrometers pixel pitch (1000 lines/inch) is fabricated with higher than 80% fill factor showing initial brightness of above 500fL and high contrast ratios (>100:1). These devices demonstrated the successful combination of active circuitry fabricated using conventional IC processing with standard electroluminescent processing. This AMEL approach provides the potential for head-mounted displays with a very small profile and high efficiency.

High-density active matrix electroluminescent display using single-crystal silicon-on-insulator high-voltage IC technology

A novel, high-density, active-matrix, electroluminescent display has been fabricated using single-crystal silicon-on-insulator technology. This new approach offers many advantages including high brightness, superior speed, low power dissipation, high pixel density, high resolution, good gray-scale performance, and improved reliability.<<ETX>>