Gene Everad Parris

High refractive index immersion fluids for 193 nm immersion lithography

For the next-generation immersion lithography technology, there is a growing interest in the immersion fluids having a refractive index larger than 1.5 and low absorbance at 193nm wavelength. In this paper, we report our effort in identifying new immersion fluid candidates. The absolute refractive index values and thermo-optic coefficients, dn/dT, were measured with 1x10-4 and 1x10-5 accuracy respectively at 193nm wavelength. The results showed promising candidates having refractive index ranging from 1.5 to 1.65 with low absorbance at 193nm wavelength. Preliminary imaging results with a new immersion fluid gave good 65nm Line/Space patterns. However, the minimum exposure time of 20sec is about ten times as needed for water, indicating the need to further reduce the absorbance of the immersion fluid.

Formulated surface conditioners in 50 nm immersion lithography:simultaneously reducing pattern collapse and line-width roughness

With the introduction of immersion lithography into IC manufacturing for the 45nm node, pattern collapse and line width roughness (LWR) remain critical challenges that can be addressed by implementing formulated surface conditioners. Surface conditioners are capable of solving multiple issues simultaneously and are easily integrated into the post-develop photolithography process. In this paper, we assessed the impact and reported our findings using a formulated surface conditioning solution in an immersion lithography process to improve the non-pattern collapse and LWR process windows on 300mm Si wafers having 50 nm L/S features. The non-pattern collapse and LWR process window results were then compared to wafers processed using traditional developer processing methods, a DI Water (DIW) rinse. We report our findings using Focus Exposure Matrix (FEM) wafers having 50nm dense lines/spaces (L/S) and a 2.4:1 aspect ratio to determine the non-collapse and LWR process windows. An ASML TWINSCAN XT:1700TM Scanner and a 6%attPSM mask were used to pattern the FEM and LWR wafers. The wafers were then developed using an optimized developer recipe on an RF3iTM coater-developer track. Each wafer was analyzed and evaluated to determine the impact to CD and LWR with respect to the non-pattern collapse process window Formulated surface conditioners having dual capabilities, reduced pattern collapse and LWR, have demonstrated that multiple ITRS Roadmap goals can be achieved and easily implemented into standard IC processing in order to meet these challenges.