George Samachisa

Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements

Dual floating gate EEPROM cell array with steering gates shared by adjacent cells

Processing techniques for making a dual floating gate EEPROM cell array

Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines

Method of reducing disturbs in non-volatile memory

Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same

Ultrahigh density monolithic, three dimensional vertical NAND memory device

Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture

Non-volatile memory cells utilizing substrate trenches

Non-volatile memory having 3d array of read/write elements with vertical bit lines and laterally aligned active elements and methods thereof