Georgia Tsirimokou
University of Patras
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Publication
Featured researches published by Georgia Tsirimokou.
International Journal of Circuit Theory and Applications | 2015
Georgia Tsirimokou; Costas Laoudias; Costas Psychalinos
Novel configurations of fractional-order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh-domain and log-domain integrators are presented. Because of the employment of metal-oxide-semiconductor MOS transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra-low-voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional-order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company TSMC 180-nm complementary MOS CMOS process. Copyright
Microelectronics Journal | 2016
Fabian Khateb; David Kubanek; Georgia Tsirimokou; Costas Psychalinos
This paper presents the design and implementation of fractional-order filters based on promising CMOS structure of Differential Difference Current Conveyor (DDCC), which was designed and fabricated using the 0.35µm CMOS AMIS process. The derivation of the filters has been achieved using a second-order approximation of the corresponding fractional-order transfer functions. The filters offer the benefit of low-voltage (?500mV) operation as well as the requirement of grounded passive elements. In addition, a technique for the quick derivation of high-order filters has been introduced. The simulation and experimental results prove the attractive performances of the proposed filters.
international symposium on circuits and systems | 2015
Georgia Tsirimokou; Costas Psychalinos; Ahmed S. Elwakil
Fractional-order filter realizations with Chebyshev characteristics, approximated by appropriate integer-order topologies, are realized in this work. The employed active blocks were current-mirrors and the derived filters offer the following attractive characteristics: capability of operating in a low-voltage environment, circuit simplicity and resistor-less realization. In addition, a digitally controlled current division network is employed to perform electronic adjustment of the cut-off frequency as well as the order of the filters. The performance of the proposed fractional-order filters is evaluated through the Analog Design Environment of the Cadence software and the Design Kit provided by the AMS 0.35μm CMOS process. The obtained simulation results for orders 1.2, 1.5, and 1.8 confirm that both pass-band and stop-band characteristics of the filters are preserved, while the transition from pass-band to stop-band is performed in fractional-order steps.
Microelectronics Journal | 2016
Georgia Tsirimokou; Costas Psychalinos; Todd J. Freeborn; Ahmed S. Elwakil
A novel topology suitable for emulating fractional-order capacitors and inductors using current excitation is achieved using a fractional-order differentiator/integrator block and appropriately configured Operational Transconductance Amplifiers. The scheme is capable of emulating both fractional-order capacitors and fractional-order inductors without any modifications to its structure. This implementation allows for electronic tuning of the order, capacitance/inductance, and bandwidth of operation by modification of only the bias current. Post-layout simulation results of the impedance magnitude and phase confirm the correct emulated behavior of both fractional-order capacitors and inductors. Two examples highlight the applications of this topology in i) realizing a fractional-order bandpass filter and ii) emulating a Cole-impedance model for biological applications. For both examples the characteristics of each circuit are validated in simulation.
Circuits Systems and Signal Processing | 2016
Costas Psychalinos; Georgia Tsirimokou; Ahmed S. Elwakil
Switched-capacitor fractional-step filter design of low-pass filter prototypes with Butterworth characteristics is reported in this work for the first time. This is achieved using discrete-time integrators which implement both the bilinear and the Al-Alaoui s-to-z transformations. Filters of orders 1.2, 1.5 and 1.8 as well as 3.2, 3.5, and 3.8 are designed and verified using transistor-level simulations with Cadence on AMS
International Journal of Circuit Theory and Applications | 2017
Georgia Tsirimokou; Costas Psychalinos; Ahmed S. Elwakil
international conference on telecommunications | 2016
Ilias Dimeas; Georgia Tsirimokou; Costas Psychalinos; Ahmed S. Elwakil
0.35\,\upmu
Journal of Circuits, Systems, and Computers | 2017
Ilias Dimeas; Georgia Tsirimokou; Costas Psychalinos; Ahmed S. Elwakil
Journal of Circuits, Systems, and Computers | 2018
Georgia Tsirimokou; Aslihan Kartci; Jaroslav Koton; Norbert Herencsar; Costas Psychalinos
0.35μm CMOS process. Digital programmability of the fractional-step filters is also achieved.
International Journal of Electronics Letters | 2015
Georgia Tsirimokou; Costas Psychalinos; Farooq Ahmad Khanday; N. A. Shah
Summary Novel topologies of fractional-order generalized filters are introduced in this paper. These offer the following benefits: (1) realization of lowpass, highpass, bandpass, allpass, or bandstop filter functions by the same topology; (2) resistorless realizations; (3) electronic adjustment of their frequency characteristics as well as their order; and (4) employment of only grounded capacitors. All the above have been achieved using Operational Transconductance Amplifiers as active elements and appropriate multi-feedback topologies. The behavior of the proposed designs is verified through simulation results using the Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35-µm complementary metal–oxide–semiconductor process. Copyright