Giorgos Kostopoulos

Hardware implementation of the RC4 stream cipher

In this paper, an efficient hardware implementation of the RC4 stream-cipher is proposed. In contrary to previous designs, which support only fixed length key, the proposed implementation integrates in the same hardware module an 8-bit up to 128-bit key length capability. Independently of the key length, the proposed VLSI implementation achieves a data throughput up to 22 Mbytes/sec in a maximum frequency of 64 MHz. The whole design was captured by using VHDL language and a FPGA device was used for the hardware implementation of the architecture. A detailed analysis, in terms of performance, and covered area is shown.

Comparison of the hardware architectures and FPGA implementations of stream ciphers

In this paper, the hardware implementations of five representative stream ciphers are compared in terms of performance and consumed area. The ciphers used for the comparison are the A5/1, W7, E0, RC4 and Helix. The first three ones have been used for the security part of well-known standards. The Helix cipher is a recently introduced fast, word oriented, stream cipher. The W7 algorithm has been recently proposed as a more trustworthy solution for GSM, due to the security problems that occurred concerning the A5/1 strength. The designs were coded using the VHDL language. For the hardware implementation of the designs, an FPGA device was used. The implementation results illustrate the hardware performance of each cipher in terms of throughput-to-area ratio. This ratio equals: 5.88 for the A5/1, 1.26 for the W7, 0.21 for the E0, 2.45 for the Helix and 0.86 for the RC4.

Software and Hardware Issues in Smart Card Technology

An efficient and strongly secure smart card mechanism involves the use of a technological background taken from the fields of computers, VLSI design and material science. The result of such a mixture is a miniature, fully operational, computation system. The nature of the data involved in smart card transactions and smart card intended uses, introduce another important factor in the smart card design mechanism which is security. The evolution of VLSI technology allows the efficient implementation of costly cryptographic operations in the smart card design methodology. Apart from the traditional cryptographic algorithms, additional techniques and special design materials have been introduced in order to protect the smart card system from cryptanalytic attacks. New architectures of software design, like object-oriented programming, give the opportunity to implement programmable multi-application cards. Thus, smart cards are transformed into highly secure devices and their establishment in the modern computer market can be considered certain. This establishment is bound to finance upcoming research in smart cards so that this product can become the basic component of electronic commerce worldwide.

Towards a resource management and service employment framework

Owing to the increase in both heterogeneity and complexity in todays networking systems, the need arises for new network-based services architectures. They must provide flexibility and efficiency in the definition, deployment and execution of the services and, at the same time, handle the adaptability and evolution of such services. In this paper we present an approach that applies a Web-service-based resource management framework. It enables the provision of parallel applications as QoS-aware applications, whose performance characteristics may be dynamically negotiated between a client application and service providers. Our component model allows context dependencies to be explicitly expressed and dynamically managed with respect to the hosting environment, computational resources and dependencies on other components. In such a model the resource management, in terms of representation, allocation and management of the resources, plays a vital role regarding the efficiency of the entire dynamic service deployment architecture.

NASS-IMS bundled authentication study through core network concepts

Emerging broadband access technologies are enabling the introduction of IP services to an increasing number of users. The market forecasts suggest that a new class of network providers will deploy public wireless or not networks based on these new technologies. In order to offer uninterrupted IP service combined with ubiquitous seamless mobility, these multi-provider networks need to be integrated with each other. As the latest descendant of such networks, the IP Multimedia Subsystem (IMS) has been envisaged to build up the extra functionality required to bridge such functionality gaps, hence accelerate services harmonisation in the context of mixed technology networks. Based on IMS architectural perception as well on ETSI TISPAN architecture, this article presents a complementary study of NASS-IMS bundled authentication on a core network communication concept. Finally, it concludes by focusing on its performance assessment through comparisons to different core network architectures and density of users.

Security Analysis of SIP Signalling during NASS-IMS bundled Authentication

This paper deals with issues related to the way in which clients authenticate to NASS and simultaneously also gain service layer authentication using the single sign-on NASS bundled authentication. A security analysis of SIP sequence messages during NASS-IMS bundled authentication is presented. Through this analysis we aim to identify the SIP vulnerabilities during the NASS-IMS bundled authentication. To demonstrate the signaling we will use emulation software and we will design specific test cases. From this we will identify vulnerability issues during SIP signaling in the NASS-IMS bundled Authentication as well as interesting conclusions regarding NASS functionalities.