Giovanni Perbellini

Native ISS-SystemC integration for the co-simulation of multi-processor SoC

In a system-level design flow, the transition from a high-level description entry implies the refinement from an untimed, unpartitioned description to a real architecture where applications are executed on a programmable device and interact with ad-hoc hardware components. Simulation of such architectures requires the capability of efficient co-simulation of a model of hardware with a model of the processor. This paper presents two co-simulation methodologies, based on SystemC as hardware modeling language and on an instruction set simulator (ISS) as a model of the processor. The first one works at the SystemC kernel level and exploits potentialities of the GNU suite, whereas the second uses features offered by the operating system running on the ISS. The two methodologies improve co-simulation performance with respect to state-of the art methods, and provide different trade-offs between the simplicity of the programming model, the modeling power, and co-simulation performance.

A timing-accurate modeling and simulation environment for networked embedded systems

The design of state-of-the-art, complex embedded system requires the capability of modeling and simulating the complex networked environment in which such systems operate. This implies the availability of both a networking modeling environment and traditional system-level modeling and simulation methodology based on a timing accurate integration of a system-level modeling language (SystemC) and a network simulation environment (NS-2). The efficiency of the proposed design environment has been demonstrated on a description of an 802.11 MAC layer.

Heterogeneous co-simulation of networked embedded systems

Networked embedded systems pose several challenges in the modeling, simulation, and design domains. The presence of the network, in particular, makes an already critical task such as HW/SW co-simulation even more complex, since a three-way (HW/SW/network) co-simulation and co-design capability is required. Modeling of networks and their interaction with hardware and software is thus key for an effective design methodology at early stages of the design flow. In this work, we present a HW/SW/network co-simulation and co-design methodology, based on the integration of heterogeneous simulation environments such as systemC and NS (network simulator). This methodology has been successfully applied to the design of a system-on-chip performing the fast path of IPv4 routing, allowing to explore different HW/SW allocation for different network configurations.

ISS-centric modular HW/SW co-simulation

Modular design is an important requirement in modern embedded system design flows because of the widespread acceptance of new paradigms such as IP core reuse and platform-based design. Co-simulation frameworks must thus support modular design, since programmable devices, ad-hoc HW components, and the interconnect infrastructure must be easily interchangeable in order to allow design exploration while keeping the SW portion unchanged or only marginally changed. The proposed co-simulation framework implements such a modular approach to co-simulation by means of a novel paradigm in which HW models can be modified on the fly by keeping the SW parts unchanged. This is achieved through an ISS-centric co-simulation strategy in which modularity is provided in terms of (i) the replacement of HW components thanks to the use of a common interface based on the device address space, or (ii) the use of different ISSs, thanks to a re-configurable simulator. We demonstrate our approach onto an industrial-strength embedded application, showing that the proposed co-simulation strategy provides both high speed and accuracy.

Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation

Designers of factory automation applications increasingly demand tools for rapid prototyping of hardware extensions to existing systems and verification of resulting behaviors through hardware and software co-simulation. The paper presents a framework for the timing-accurate co-simulation of HDL models and their verification against hardware and software running on an actual embedded device of which only a minimal knowledge of the current design is required. Experiments on real-life applications show that early architectural and design decisions can be taken by measuring the expected performance on the models realized using the proposed framework.

Flexible energy-aware simulation of heterogeneous wireless sensor networks

This paper presents an accurate and scalable implementation of an energy-aware simulator for wireless sensor networks (WSNs). Scalability and accuracy have been achieved through an energy-aware instrumentation of the Instruction Set Simulator of nodes microcontroller and a functional SystemC TLM model of the radio module implementing the IEEE 802.15.4 protocol. The framework allows to execute actual software and to evaluate accurately its effect on the network lifetime. We first validate energy estimation results against a working hardware prototype of a wireless sensor node. The methodology, compared against state-of-the-art simulators such as NS-2, represents a flexible and scalable solution for fast and accurate prototyping of WSN software.

Mixing Simulated and Actual Hardware Devices to Validate Device Drivers in a Complex Embedded Platform

The structure and the functionalities of a device driver are strongly influenced by the target platform architecture, as well as by the device communication protocol. This makes the generation of device drivers designed for complex embedded platforms a very time consuming and error prone activity. Validation becomes then a nodal point in the design flow. The aim of this paper is to present a co-simulation framework that allows validation of device drivers. The proposed framework supports all mechanisms used by device drivers to communicate with HW devices so that both modeled and actual components can be included in the simulated embedded platform. In this way, the generated code can be tested and validated even if the final platform is not ready yet. The framework has been applied to some examples to highlight the performance and effectiveness of this approach.

Software/network co-simulation of heterogeneous industrial networks architectures

This work presents a modeling and analysis framework for heterogeneous industrial networks architectures, which is based on a tight integration of a network simulator with embedded software, middleware and a real-time operating system. This framework is suitable for modeling and simulating the behavior of typical components involved in factory automation applications (e.g., PLCs, remote controllers, operational screens, etc.) when they are connected through heterogeneous industrial networks. Experiments show that the framework allows to take early architectural decisions by evaluating the expected system performance based on the available models.

A HW/SW co-simulation framework for the verification of multi-CPU systems

This work focuses on the HW/SW co-simulation of complex systems consisting of several independent CPUpsilas (multi-CPU systems) such as multi-processor system-on-chip (MPSoC) and wireless sensor networks. The verification of such systems requires the efficient evaluation of hardware-software interactions in several processing units. We present a HW/SW co-simulation framework consisting of a timing-accurate interaction of a SystemC simulator with an array of instruction set simulators (ISS). Tests with up to one hundred ISSpsilas show that the proposed framework exploits the power of todaypsilas multi-processor hosts and represents a valuable tool for the validation of not only eight-core MPSoCpsilas but also large sensor networks.

A Middleware-centric Design Flow for Networked Embedded Systems

The paper focuses on the design of networked embedded systems which cooperate to provide complex distributed applications. A milestone in the effort of simplifying the implementation of such applications has been the introduction of a service layer, named middleware, which abstracts from the peculiarities of the operating system and HW components. However, the presence of the middleware has not been yet introduced in the design flow as an explicit dimension. This work presents an abstract model of middleware supporting different programming paradigms; it can be used as component in the design flow and allows to simulate and develop the application without doing premature assumptions on the actual HW/SW platform. At the end of the design flow the abstract middleware can be mapped to an actual middleware. The methodology has been analyzed both theoretically and practically with the actual application on a wireless sensor network