Giuseppe Notarangelo
STMicroelectronics
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Publication
Featured researches published by Giuseppe Notarangelo.
Microprocessors and Microsystems | 2013
Lech Józwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; R Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; Luigi Raffo; Giuseppe Notarangelo
This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors (ASIPs). It presents an overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program. The paper briefly presents the results of our analysis of the main challenges to be faced in the design of such heterogeneous MPSoCs. It explains which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems. Finally, it discusses the ASAM design-flow, its main stages and tools and their application to a real-life case study.
radio frequency integrated circuits symposium | 2016
Ranieri Guerra; Alessandro Finocchiaro; Giuseppe Papotto; Benedetta Messina; Leandro Grasso; Roberto La Rosa; Giulio Zoppi; Giuseppe Notarangelo; Giuseppe Palmisano
A fully integrated RF-powered receiver for remotely controlled systems is presented. The receiver adopts ASK and FSK modulations and is capable of operating in the ISM bands of 433 MHz, 869 MHz, and 915 MHz, while achieving a bit rate down to 62 kb/s. The circuit includes an RF harvester and a power management unit for the RF to DC power conversion and control, respectively, and an OTP memory with a digital interface for the operating configuration. Measurements show a harvester sensitivity of -18.8 dBm and accurate ASK demodulation with a modulation index as low as 10%. The current consumption is 87 μA and 720 μA for the ASK and FSK receiving mode, respectively. The circuit was fabricated in a 0.13-μm CMOS technology and occupies a core area of 2.2 mm2.
digital systems design | 2002
Giuseppe Notarangelo; Marco Gibilaro; Francesco Pappalardo; Agatino Pennisi; Gaetano Palumbo
In this paper a low power strategy for a TFT controller is described. The design is based on a general controller for high resolutions graphic display data. The main improvements introduced concerns not only an effective power reduction of about 65.42%, compared with the original module, but also the new feature that allows one to choose among six different functional configurations. The new TFT controller works also with the new display generation such as organic LED (OLED) type, in this case we introduce the possibility to power down the backlighting neon. Measures are made with design compiler (Synopsys) to compute the TFT controller power consumption and the total cell area before and after our modifications.
Archive | 2008
Francesco Pappalardo; Giuseppe Notarangelo; Elio Guidetti
Archive | 2006
Francesco Pappalardo; Giuseppe Notarangelo; Elena Salurso; Elio Guidetti
Archive | 2008
Francesco Pappalardo; Giuseppe Notarangelo
Archive | 2007
Francesco Pappalardo; Giuseppe Notarangelo; Elena Salurso; Elio Guidetti
Archive | 2004
Francesco Pappalardo; Giuseppe Notarangelo; Giuseppe Visalli
Archive | 2010
Francesco Pappalardo; Giuseppe Notarangelo; Elio Guidetti
Archive | 2007
Francesco Pappalardo; Giuseppe Notarangelo; Elena Salurso; Elio Guidetti