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Dive into the research topics where Glenn A. Rinne is active.

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Featured researches published by Glenn A. Rinne.


electronic components and technology conference | 2012

Evaluation and verification of enhanced electrical performance of advanced coreless flip-chip BGA package with warpage measurement data

Ga Won Kim; Ji Heon Yu; Chul Woo Park; Seoung Joon Hong; Jin Young Kim; Glenn A. Rinne; Choonheung Lee

In this paper, the 8+1-layer coreless substrate of fcBGA will be introduced, which was revised from the 12-layer core substrate. This coreless substrate was manufactured in Shinko using an advanced ABF film (GZ41) having low CTE for lower warpage and better assembly performance. To evaluate and verify the electrical performance, the fabricated coreless substrate was measured for S- and Z-parameters in frequency-domain and measured for differential TDR impedance and eye-diagram & timing jitter histogram in time-domain. The simulated and measured results were compared with the simulated results of the 12-layer core substrate for evaluation of the improvement from signal/power integrity. In order to evaluate the assembly performance of the coreless substrate, the warpage data and basic material data (Tg, CTE) were measured and demonstrated for die attach area and non-die area.


Archive | 2005

Methods of forming electronic structures including conductive shunt layers and related structures

Krishna K. Nair; Glenn A. Rinne; William E. Batchelor


Archive | 2005

Non-Circular via holes for bumping pads and related structures

William E. Batchelor; Glenn A. Rinne


Archive | 2007

Methods of forming metal layers using multi-layer lift-off patterns

Glenn A. Rinne


Archive | 2004

Low temperature methods of bonding components and related structures

Glenn A. Rinne; Krishna K. Nair


Archive | 2003

Electronic structures including conductive shunt layers

Krishna K. Nair; Glenn A. Rinne; William E. Batchelor


Archive | 2007

Methods of Forming Electronic Interconnections Including Compliant Dielectric Layers and Related Devices

Glenn A. Rinne


Archive | 2007

Electronic devices including solder bumps on compliant dielectric layers

Glenn A. Rinne


Archive | 2007

Methods of forming back side layers for thinned wafers

Glenn A. Rinne; Kevin Engel; Julia Roe; Chirstopher John Berry


Archive | 2013

Semiconductor device using emc wafer support system and fabricating method thereof

Jin Young Kim; Doo Hyun Park; Ju Hoon Yoon; Seong Min Seo; Glenn A. Rinne; Choon Heung Lee

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