Glenn Alan Forman

A dynamically reconfigurable interconnection chip

This paper will describe a 70K transistor chip fabricated in a 1.25μm CMOS technology, with a 6.2×7.6mm die size, and featuring data synchronization, pipeline latency compensation and other computational elements.

High density overlay interconnect (HDI) delivers high frequency performance for GaAs systems

The authors point out that large die size, high gate and transistor count digital GaAs devices present problems to the system designer, such as efficient distribution of low voltage, high current power supply bias (2 VDC at 25 A, and greater). The effective delivery of such electrical power must also allow for efficient removal of the heat generated by the electronics circuits. By exploiting appropriate MCM technology, these thermal concerns are satisfied while eliminating to a maximum extent conventional circuit packaging parasitics which limit performance of high frequency systems. The overlay interconnect MCM approach used by GE/TI places IC chips first, into a structure for the most advantageous thermal management, while eliminating conventional packaging resistance, inductance and capacitance effects. Several designs constructed with overlay interconnect demonstrate the highest frequency operation and thermal performance of MCMs to date. System designs with 400 MHz and greater clock operation and dissipating 50 W are described.<<ETX>>

Die for MCMs: IC preparation for testing, analysis and assembly

A method of die preparation for test, analysis and burn-in is described that can begin to address multichip module (MCM) infrastructure requirements for obtaining known good die. The process developed provides full functional component testing, timing analysis at speed, and burn-in of ICs prior to MCM insertion. A soluble polymer overlay was coated on the die surface and patterned with new top level metal bond pads, allowing standard packaging, testing and burn-in while permitting a method of recovering selected devices for use in an MCM. The overlay formed a protective coating for the die and if left in place may be used to support assembly specific metallization patterns and various metal finish types. A demonstration of this technique is reported and the component quality and analysis effort is described.<<ETX>>