Philippe Jacob

A high speed FIR filter designed by compiler

Digital-serial computation is a hybrid between bit-serial computation and parallel computation. In digit-serial computation, data is divided into digits of N bits, and computations take place one digit of data at a time. The PARSIFAL silicon compiler is a software environment for designing chips using this basic computational architecture. The authors report on a four-tap FIR (finite-impulse response) filter built using this compiler. In order to avoid the throughput loss inherent in serial computation, two parallel computations are interleaved to achieve a 35-MHz-per-sample throughput rate

Acoustic shot peening method and apparatus

The present invention provides a method of shot peening at least a portion of a rotary machine comprising a rotor. Shot peening is carried out with a rotor which is at least partly assembled. The method includes fixing a system for supporting at least one acoustic assembly to the machine; and shot peening at least one region of the machine using projectiles which are moved by the acoustic assembly.