Gordon Ma

Modeling, analysis, and design of RF LDMOS devices using harmonic-balance device simulation

This paper describes how device simulation may be used for the modeling, analysis, and design of radio-frequency (RF) laterally diffused metal-oxide-semiconductor (LDMOS) transistors. Improvements to device analysis needed to meet the requirements of RF devices are discussed. Key modeling regions of the LDMOS device are explored and important physical effects are characterized. The LDMOS model is compared to dc and small-signal ac measurements for calibration purposes. Using the calibrated model, large-signal accuracy is verified using harmonic distortion simulation, and intermodulation analysis. Predictive analysis and a study of the structures parasitic components are also presented. Load-pull simulation is used to analyze matching network effects to determine the best choices for device impedance matching.

Device simulation for RF applications

The rapid growth of wireless systems at radio frequencies (RF) is driving the need for improved analog circuit and device analysis at gigaHertz frequencies. This includes: low noise front ends, linear amplifiers, mixers, and power amplifiers. Moreover, the parasitic effects of capacitance and inductance, both on- and off-chip, require careful extraction and characterization in support of predictive modeling. While time-domain techniques work well for digital systems, often the spectral and dynamic range requirements for communications systems necessitate accurate analysis of harmonic content with frequency differences of a thousandfold or more. This paper demonstrates the applicability and unique strengths of device-level harmonic balance (HB) in the simulation and physical modeling of RF circuits.

High frequency power LDMOS technologies for base station applications status, potential, and benchmarking

LDMOS technologies based in G. Ma et al. (1996) and H. Brech et al. (2003) have been in dominate position in wireless base station applications for frequencies ranging from 450MHz to 2.7GHz for the last 10 years due to performance, cost, reliability, and power capability advantages. This paper reviews the leading edge LDMOS development at Infineon and discusses future potential and limitation for LDMOS technologies in general; benchmarking with alternative technologies is also presented

Harmonic balance device analysis of an LDMOS RF power amplifier with parasitics and matching network

This paper discusses a harmonic balance simulation involving a high power LDMOS device, bias circuitry and matching network. The paper begins with a discussion of the device and circuit configuration as well as the requirements for simulation. Next the paper describes the simulation algorithms and simulator structure in order to meet the requirements. PISCES is used as the basis and around it are added libraries for harmonic balance simulation and circuit boundary conditions. Finally, simulation results are presented. The experimental and simulated response of the power gain and power added efficiency of an RF power amplifier are shown.

Modeling and Measurements of Electrical and Thermal Memory Effects for RF power LDMOS

Accurate modeling of memory effects is important for design of amplifiers with high requirements on linearity. In this work, asymmetries in third order intermodulation distortion products (IM3) were measured for different tone-spacings and compared to simulations. An accurate large-signal model and careful modeling of the test circuit, especially the drain bias feeds is important for correct prediction of sideband asymmetries. Transient thermal measurements were employed to extract a thermal network with two time constants, one for the die and another one for the package. The IM3 asymmetries were found to be dominated by impedances in the output circuit for large tone-spacings; for very small tone-spacings (< 10 kHz), thermal effects have an important influence. The IM3 asymmetries agreed qualitatively well between simulations and measurements as a function of output power for different tone-spacings.

Linearity Analysis of RF LDMOS Devices Utilizing Harmonic Balance Device Simulation

Linearity is one of the most important characteristics for current and next-generation RF power devices for wireless communication. In this work, linearity of power LDMOS devices is analysed by using a unique harmonic balance device simulator. Sweet-spots in the third order intermodulation distortion product (IM3) are explained and found to be in agreement with measurements and compact modeling. For demonstration of the simulation methodology, a change in the lightly doped drain (LDD) region doping concentration was performed and the effect on linearity was analysed.

RF LDMOS Power Amplifier Integrated Circuits for Cellular Wireless Base Station Applications

Three broadband RF LDMOS power amplifier integrated circuits (PA ICs) for cellular base station applications have been developed in Si LDMOS IC technologies. They can be used for all typical modulation formats from 800 MHz to 2300 MHz, and power levels from 30 W to 50 W depending on application. GSM/EDGE PA IC achieved 35 dB gain and 30 W with 200 MHz bandwidth (22% bandwidth) at 900 MHz. CDMA2000 PA IC achieved 30 dB gain and 40 W with 300 MHz bandwidth (15% bandwidth) at 1900 MHz. TD-SCDMA/WCDMA PA IC achieved 27 dB gain and 50 W under TD-SCDMA signal and 40 W under WCDMA signal with 400 MHz bandwidth (20% bandwidth) at 2100 MHz. All three PA ICs have been characterized under all typical modulations formats and showed excellent linear power, efficiency, and bandwidth. The excellent performances of these three PA ICs, simplify power amplifier designs, enable a small footprint and help lower the cost of the modern base-station

Device Analysis of Linearity in RF Power Devices by Harmonic Balance Device Simulation

Low distortion is one of the most important concerns for current and next-generation wireless communication systems. In this work, the linearity of RF power MOS devices are analysed by using a unique harmonic balance device simulator. Sweet-spots in the third order intermodulation distortion product (IM3) were investigated and interpreted in terms of bias and device design parameters. The demonstrated methodology helps in laying ground-work for improved device design and investigation of new device concepts for improved linearity

A New Methodology for Efficient and Reliable Large- Signal Analysis of RF Power Devices

In RF power device design, much of the analysis is based on measurements. Complete analysis by simulation is often avoided because the high-frequency, largesignal operation makes device simulation unsuitable, and the difficulties in obtaining a good physical compact model make circuit simulation inaccurate. This work presents a methodology that overcomes these limitations by utilizing a combination of device and circuit simulations to characterize large-signal operation of RF power devices quickly and accurately. Results show that circuit simulations using an extracted Root model agree well with device simulation for the intrinsic device. It is also demonstrated that changes in device design are reflected in circuit-level RF performance.