Greg A. Blodgett

Memory with address management

Memory device with pulse circuit for timing data output, and method for outputting data

Method and system for low power refresh of dynamic random access memories

Temperature sensitive oscillator circuit

Memory address repair without enable fuses

MEMORY DEVICE AND METHOD HAVING REDUCED-POWER SELF-REFRESH MODE

Semiconductor memory having multiple redundant columns with offset segmentation boundaries

Circuit having a control array of memory cells and a current source and a method for generating a self-refresh timing signal

Low voltage charge pump circuit and method for pumping a node to an electrical potential

Device and method for generating a low-voltage reference