Guangyang Lin

Germanium n+/p shallow junction with record rectification ratio formed by low-temperature preannealing and excimer laser annealing

A germanium n+/p shallow junction formed by a combination of low-temperature preannealing (LTPA) and excimer laser annealing at a low fluence of 150 mJ/cm2 for phosphorus-implanted germanium is demonstrated. The LTPA step plays a critical role in annihilating the implantation damages and significantly suppressing phosphorus diffusion during laser annealing process, resulting in a very small dopant diffusion length with high activation level of phosphorus. A well-behaved Ge n+/p shallow junction diode with a record rectification ratio of ~107 and low leakage current density of 8.3 × 10-5 A/cm2 is achieved, which is greatly beneficial to the scaled Ge MOSFET technology.

Low Specific Contact Resistivity to n-Ge and Well-Behaved Ge n+/p Diode Achieved by Implantation and Excimer Laser Annealing

National Basic Research Program of China [2012CB933503, 2013CB632103]; National Natural Science Foundation of China [61176092, 61036003, 60837001]; Ph. D. Programs Foundation of the Ministry of Education of China [20110121110025]; Fundamental Research Funds for the Central Universities [2010121056]

Strong electroluminescence from direct band and defects in Ge n+/p shallow junctions at room temperature

Strong room temperature electroluminescence with two emission peaks at around 0.786 eV and 0.747 eV from Ge n+/p shallow junctions was reported. The peak at around 0.786 eV comes from direct band luminescence (DBL) in n + Ge regions, while the peak fixing at 0.747 eV is resulted from defects induced by ion implantation. Heavy n-type doping in Ge renders realization of strong defect-related luminescence (DRL) feasible. The peak intensity ratio of DRL/DBL decreases with increase of injection current since more electrons are filled in Γ valley. Above all, the Ge n+/p shallow junction is fully compatible with the source and drain in Ge metal-oxide-semiconductor field effect transistors.

Strong room temperature electroluminescence from lateral p-SiGe/i-Ge/n-SiGe heterojunction diodes on silicon-on-insulator substrate

A lateral p-Si0.05Ge0.95/i-Ge/n-Si0.05Ge0.95 heterojunction light emitting diode on a silicon-on-insulator (SOI) substrate was proposed, which is profitable to achieve higher luminous extraction compared to vertical junctions. Due to the high carrier injection ratio of heterostructures and optical reflection at the SiO2/Si interface of the SOI, strong room temperature electroluminescence (EL) at around 1600 nm from the direct bandgap of i-Ge with 0.30% tensile strain was observed. The EL peak intensity of the lateral heterojunction is enhanced by ∼4 folds with a larger peak energy than that of the vertical Ge p-i-n homojunction, suggesting that the light emitting efficiency of the lateral heterojunction is effectively improved. The EL peak intensity of the lateral heterojunction, which increases quadratically with injection current density, becomes stronger for diodes with a wider i-Ge region. The CMOS compatible fabrication process of the lateral heterojunctions paves the way for the integration of the l...

Suppressing the formation of GeOx by doping Sn into Ge to modulate the Schottky barrier height of metal/n-Ge contact

Tin (Sn) was introduced into Ge for the preparation of a thin GeSnOx by thermal oxidation, which could strongly modulate the Schottky barrier height of metal/n-Ge contacts. A small amount of Sn doping in Ge could effectively suppress the formation of GeOx during oxidation, alleviating the Fermi-level pinning effect in Ge. This resulted in the strong correlation between the Schottky barrier heights of metal/GeSnOx/n-Ge contacts and metal work functions. The ohmic Al/n-Ge contacts and the extremely low leakage current density of the HfO2/Ge structure achieved by the simple thermal oxidation of a Sn-doped Ge surface suggested the potential of this method in the fabrication of Ge-based devices.

Self-compliance Pt/HfO2/Ti/Si one-diode–one-resistor resistive random access memory device and its low temperature characteristics

A bipolar one-diode–one-resistor (1D1R) device with a Pt/HfO2/Ti/n-Si(001) structure was demonstrated. The 1D1R resistive random access memory (RRAM) device consists of a Ti/n-Si(001) diode and a Pt/HfO2/Ti resistive switching cell. By using the Ti layer as the shared electrode for both the diode and the resistive switching cell, the 1D1R device exhibits the property of stable self-compliance and the characteristic of robust resistive switching with high uniformity. The high/low resistance ratio reaches 103. The electrical RESET/SET curve does not deteriorate after 68 loops. Low-temperature studies show that the 1D1R RRAM device has a critical working temperature of 250 K, and at temperatures below 250 K, the device fails to switch its resistances.

High-Performance Ge p-n Photodiode Achieved With Preannealing and Excimer Laser Annealing

A germanium (Ge) n+/p shallow junction photodiode fabricated by a combination of low-temperature preannealing and excimer laser annealing of the phosphorus-implanted p-type Ge is demonstrated. The Ge photodiode shows a high responsivity of 0.48 A/W at the 1.55-μm wavelength and an extremely low leakage current density of 1 pA/μm2 at room temperature, over two orders of magnitude lower than that of diodes formed by the rapid thermal annealing process. In addition, the reverse leakage current is close to the theoretical limitation of Ge diodes dominated by the ideal carrier diffusion model. The well-controlled dopant profile of the Ge shallow junction should be beneficial for improving the performance of the diodes, which may also be used in making the source and drain of scaled Ge nMOSFET.

Formation of nickel germanide on SiO2-capped n-Ge to lower its Schottky barrier height

In this Letter, NiGe/SiO2/n-Ge ohmic contacts were demonstrated with Ge, rather than Ni, diffusion through the ion-implanted SiO2 films to form NiGe. The equivalent Schottky barrier height reduced from 0.58 eV for NiGe/n-Ge to ohmic contact. The anomalous diffusion behavior and accumulation of Ge in the SiO2 near the NiGe/SiO2 interface can be explained by vacancy-enhanced Ge diffusion. It is proposed that the presence of vacancies and Ge atoms embedded in the SiO2 layer play a significant role in the current enhancement by generation of multiple levels in the SiO2 band gap.

Resistive switching properties of polycrystalline HfO x N y films by plasma-enhanced atomic layer deposition

Polycrystalline HfO x N y films were deposited by plasma-enhanced atomic layer deposition. Bipolar resistive switching properties were observed in the Ag/HfO x N y /Pt devices (Ag-devices) which had stable SET/RESET voltages and high high/low resistance ratios of ~105. Pt/HfO x N y /Pt structured devices (Pt-devices) was prepared for comparison. The current–voltage characterizations and resistance temperature coefficients measurement suggested that the resistance switching is dominated by formation and rupture of Ag filaments for the Ag-devices, and is governed by formation and annihilation of oxygen vacancies for the Pt-devices. HfO x N y films are promising in the application of electrochemical metallization memories.

Low-temperature formation of GeSn nanocrystallite thin films by sputtering Ge on self-assembled Sn nanodots on SiO2/Si substrate

A simple method to form GeSn nanocrystallite thin films with high Sn composition at low temperature by sputtering Ge on self-assembled Sn nanodots is proposed. During the sputtering process, Ge atoms diffuse into Sn nanodots and then nanocrystalline GeSn freezes out as temperature is above 150 °C. GeSn nanocrystallite thin films with high Sn composition of 27.3% are achieved at 150 °C and Sn composition decreases gradually with elevation of temperature. The hole mobility of the GeSn nanocrystallite thin film of 14.0 cm2V−1s−1 is achieved with the process temperature of less than 275 °C, which is suitable for flexible electronics.