Jianfang Xu

Carbon-coated Si micrometer particles binding to reduced graphene oxide for a stable high-capacity lithium-ion battery anode

Micrometer Si (MSi) particles are an attractive alternative as high energy-density lithium-ion battery anodes. To maintain the structural integrity and resolve the electrical conduction problem of MSi-based anodes, we propose novel MSi/C/reduced graphene oxide (RGO) through simple ball milling liquid polyacrylonitrile (PAN) with MSi and graphene oxide nanosheets, followed by thermal reduction. This structure capitalizes on the interaction of MSi and carbonized PAN with RGO sheets to provide a robust microarchitecture. The mechanical integrity of the in situ formed porous configuration can be dramatically improved by manipulating the size of unreacted Si nanocrystals. In addition, the Si–N–C layer serves as an electrolyte blocking layer, which helps to build a stable SEI layer and results in a high initial coulombic efficiency of 91.7%. Furthermore, the RGO binding to MSi/C acts as a flexible buffer during galvanostatic cycling, allowing microparticles to expand and fractured nanoparticles to anchor, while retaining electrical connectivity at both the particle and electrode levels. As a result, this hierarchical structure exhibits a superior reversible capacity of 1572 mA h g−1 with no capacity loss for 160 cycles at 0.2 A g−1 and over 628 mA h g−1 for 1000 cycles at 2 A g−1.

Voltage sharing effect and interface state calculation of a wafer-bonding Ge/Si avalanche photodiode with an interfacial GeO2 insulator layer.

The tunneling effect and interface state in the p-Ge/GeO2p-Si structure of a wafer-bonding Ge/Si avalanche photodiode (APD) are investigated. It is found that the thin interfacial GeO2 layer (1-2 nm) formed by the hydrophilic reaction at the wafer-bonding interface significantly affects the performance of the Ge/Si APD. With the increase of the GeO2 thickness, the dark current of the Ge/Si APD decreases enormously due to the blocking effect of this GeO2 layer. Owing to the carrier accumulation in Ge layer under illumination condition, the voltage sharing effect of the GeO2 layer (thicker) becomes serious, leading to the absence of the electric field in Ge layer. The photon-generated electrons at Ge/GeO2 interface can be captured and released by the interface states at certain reverse bias. This can adjust the avalanche current of the Ge/Si APD. The stronger interface recombination induced by the larger interface state density (ISD) results in the decrease of the electric field in Ge layer. This increases the transit time of carriers, which in turn decreases the 3dB-bandwidth. Due to the drastic increase of the dark current (larger ISD), the gain of the Ge/Si APD decreases.

Self-compliance Pt/HfO2/Ti/Si one-diode–one-resistor resistive random access memory device and its low temperature characteristics

A bipolar one-diode–one-resistor (1D1R) device with a Pt/HfO2/Ti/n-Si(001) structure was demonstrated. The 1D1R resistive random access memory (RRAM) device consists of a Ti/n-Si(001) diode and a Pt/HfO2/Ti resistive switching cell. By using the Ti layer as the shared electrode for both the diode and the resistive switching cell, the 1D1R device exhibits the property of stable self-compliance and the characteristic of robust resistive switching with high uniformity. The high/low resistance ratio reaches 103. The electrical RESET/SET curve does not deteriorate after 68 loops. Low-temperature studies show that the 1D1R RRAM device has a critical working temperature of 250 K, and at temperatures below 250 K, the device fails to switch its resistances.

An improvement of HfO2/Ge interface by in situ remote N2 plasma pretreatment for Ge MOS devices

In situ remote N2 plasma pretreatment of Ge substrate before deposition of HfO2 is proved effective to reduce GeOx interlayer at the HfO2/Ge interface, resulting in a smaller capacitance equivalent oxide thickness, lower interface trap density and leakage current density for the metal/HfO2/n-Ge capacitors. However, it has no obvious impact on the metal/HfO2/p-Ge capacitors, showing a much higher interface trap density than that on n-Ge. The high equivalent permittivity of the HfO2 gate stacks (~24.2) confirmed the removal of GeOx interlayer by N2 plasma pretreatment. In situ remote N2 plasma pretreatment is demonstrated perspective to make metal/HfO2/n-Ge MOSFET with scaling capacitance equivalent oxide thickness.

Resistive switching properties of polycrystalline HfO x N y films by plasma-enhanced atomic layer deposition

Polycrystalline HfO x N y films were deposited by plasma-enhanced atomic layer deposition. Bipolar resistive switching properties were observed in the Ag/HfO x N y /Pt devices (Ag-devices) which had stable SET/RESET voltages and high high/low resistance ratios of ~105. Pt/HfO x N y /Pt structured devices (Pt-devices) was prepared for comparison. The current–voltage characterizations and resistance temperature coefficients measurement suggested that the resistance switching is dominated by formation and rupture of Ag filaments for the Ag-devices, and is governed by formation and annihilation of oxygen vacancies for the Pt-devices. HfO x N y films are promising in the application of electrochemical metallization memories.

Low-temperature formation of GeSn nanocrystallite thin films by sputtering Ge on self-assembled Sn nanodots on SiO2/Si substrate

A simple method to form GeSn nanocrystallite thin films with high Sn composition at low temperature by sputtering Ge on self-assembled Sn nanodots is proposed. During the sputtering process, Ge atoms diffuse into Sn nanodots and then nanocrystalline GeSn freezes out as temperature is above 150 °C. GeSn nanocrystallite thin films with high Sn composition of 27.3% are achieved at 150 °C and Sn composition decreases gradually with elevation of temperature. The hole mobility of the GeSn nanocrystallite thin film of 14.0 cm2V−1s−1 is achieved with the process temperature of less than 275 °C, which is suitable for flexible electronics.

Room Temperature Electroluminescence from Tensile-Strained Si0.13Ge0.87/Ge Multiple Quantum Wells on a Ge Virtual Substrate

Direct band electroluminescence (EL) from tensile-strained Si0.13Ge0.87/Ge multiple quantum wells (MQWs) on a Ge virtual substrate (VS) at room temperature is reported herein. Due to the competitive result of quantum confinement Stark effect and bandgap narrowing induced by tensile strain in Ge wells, electroluminescence from Γ1-HH1 transition in 12-nm Ge wells was observed at around 1550 nm. As injection current density increases, additional emission shoulders from Γ2-HH2 transition in Ge wells and Ge VS appeared at around 1300–1400 nm and 1600–1700 nm, respectively. The peak energy of EL shifted to the lower energy side superquadratically with an increase of injection current density as a result of the Joule heating effect. During the elevation of environmental temperature, EL intensity increased due to a reduction of energy between L and Γ valleys of Ge. Empirical fitting of the relationship between the integrated intensity of EL (L) and injection current density (J) with L~Jm shows that the m factor increased with injection current density, suggesting higher light emitting efficiency of the diode at larger injection current densities, which can be attributed to larger carrier occupations in the Γ valley and the heavy hole (HH) valance band at higher temperatures.

Interface State Calculation of the Wafer-Bonded Ge/Si Single-Photon Avalanche Photodiode in Geiger Mode

More and more attention has been paid to the heterogeneous semiconductor device based on the wafer-bonding method due to its high-quality wafer-bonded active layer. In this paper, we first theoretically study the dependence of the single-photon properties, including the single-photon detection efficiency (SPDE), dark count rate (DCR), and afterpulsing probability (AP), of the wafer-bonded Ge/Si single-photon avalanche photodiode (SPAD) on the interface state at the Ge/Si (hydrophilic reaction) and Si-Si (hydrophobic reaction or surface-activated method) wafer-bonded interface based on the Poisson statistics. It is found that the interface state density and the energy level position of the interface state significantly affect the linear-mode electric field distribution (avalanche probability), 3-dB bandwidth (dark carriers), gain (quantum efficiency), and effective transit time (trapped carriers), which in turn affect the DCR and the SPDE. Furthermore, the dependence of the AP on the avalanche charge and the interface recombination rate is clarified as well. It is expected that this paper may give guidance for the fabrication of high-performance SPAD.

High-performance germanium n+/p junction by nickel-induced dopant activation of implanted phosphorus at low temperature

High-performance Ge n+/p junctions were fabricated at a low formation temperature from 325 °C to 400 °C with a metal(nickel)-induced dopant activation technique. The obtained NiGe electroded Ge n+/p junction has a rectification ratio of 5.6× 104 and a forward current of 387 A/cm2 at −1 V bias. The Ni-based metal-induced dopant activation technique is expected to meet the requirement of the shallow junction of Ge MOSFET.