Jianyuan Wang

Interfacial nitrogen stabilizes carbon-coated mesoporous silicon particle anodes

We report for the first time that the dehydrogenation process of PAN was suppressed and the silicon oxide of the MSP surface was reduced during annealing in Ar + H2. Consequently, the remaining –NH bonds of the carbon chain can interact with the fresh amorphous Si on the surface of the MSPs to form a Si–N–C layer, which improves the adhesion between Si and C and serves as a stable electrolyte blocking layer. In addition, based on micron-sized MSPs, the structural stability of the electrode is dramatically enhanced through in situ formation of Si nanocrystals of less than 5 nm. The low Li+ diffusion kinetics of the Si–N–C layer and self limiting inhomogeneous lithiation in MSPs jointly create unlithiated Si nanocrystals, acting as supporting frames to prevent pulverization of the anode material. Our nitriding MSP anode has exhibited for the first time a 100% capacity retention (394 mA h g−1) after 2000 cycles (10 cycles each at 0.1, 0.5, 1, 2, and 1 and then 1950 cycles at 0.5 A g−1) and a 100% capacity retention at 0.1 A g−1 (540 mA h g−1) after 400 cycles. Thus, our work proposes a novel avenue to engineer battery materials with large volume changes.

Strong room temperature electroluminescence from lateral p-SiGe/i-Ge/n-SiGe heterojunction diodes on silicon-on-insulator substrate

A lateral p-Si0.05Ge0.95/i-Ge/n-Si0.05Ge0.95 heterojunction light emitting diode on a silicon-on-insulator (SOI) substrate was proposed, which is profitable to achieve higher luminous extraction compared to vertical junctions. Due to the high carrier injection ratio of heterostructures and optical reflection at the SiO2/Si interface of the SOI, strong room temperature electroluminescence (EL) at around 1600 nm from the direct bandgap of i-Ge with 0.30% tensile strain was observed. The EL peak intensity of the lateral heterojunction is enhanced by ∼4 folds with a larger peak energy than that of the vertical Ge p-i-n homojunction, suggesting that the light emitting efficiency of the lateral heterojunction is effectively improved. The EL peak intensity of the lateral heterojunction, which increases quadratically with injection current density, becomes stronger for diodes with a wider i-Ge region. The CMOS compatible fabrication process of the lateral heterojunctions paves the way for the integration of the l...

Suppressing the formation of GeOx by doping Sn into Ge to modulate the Schottky barrier height of metal/n-Ge contact

Tin (Sn) was introduced into Ge for the preparation of a thin GeSnOx by thermal oxidation, which could strongly modulate the Schottky barrier height of metal/n-Ge contacts. A small amount of Sn doping in Ge could effectively suppress the formation of GeOx during oxidation, alleviating the Fermi-level pinning effect in Ge. This resulted in the strong correlation between the Schottky barrier heights of metal/GeSnOx/n-Ge contacts and metal work functions. The ohmic Al/n-Ge contacts and the extremely low leakage current density of the HfO2/Ge structure achieved by the simple thermal oxidation of a Sn-doped Ge surface suggested the potential of this method in the fabrication of Ge-based devices.

Self-compliance Pt/HfO2/Ti/Si one-diode–one-resistor resistive random access memory device and its low temperature characteristics

A bipolar one-diode–one-resistor (1D1R) device with a Pt/HfO2/Ti/n-Si(001) structure was demonstrated. The 1D1R resistive random access memory (RRAM) device consists of a Ti/n-Si(001) diode and a Pt/HfO2/Ti resistive switching cell. By using the Ti layer as the shared electrode for both the diode and the resistive switching cell, the 1D1R device exhibits the property of stable self-compliance and the characteristic of robust resistive switching with high uniformity. The high/low resistance ratio reaches 103. The electrical RESET/SET curve does not deteriorate after 68 loops. Low-temperature studies show that the 1D1R RRAM device has a critical working temperature of 250 K, and at temperatures below 250 K, the device fails to switch its resistances.

Low-temperature oxide-free silicon and germanium wafer bonding based on a sputtered amorphous Ge

We report a potential low-cost method for low-temperature silicon (Si) and germanium (Ge) wafer bonding based on an intermediate amorphous Ge (a-Ge). The sputtered a-Ge is demonstrated to be extremely flat (RMS = ∼0.28 nm) and hydrophilic (contact angle = ∼3°). The a-Ge turns to be the polycrystalline phase at the Si/Ge/Si bonded interface, whereas it fully turns to be single-crystal phase at the Ge/Ge/Si bonded interface after annealing. The simulated stress distribution reveals that the maximum thermal stress in a-Ge dominates the crystallization process and the crystalline phase of the intermediate Ge layer depends on the induction of seed crystals. More importantly, the threading dislocation and oxide layer are not observed at the bonded interface. This finding may be applied to fabricate high-performance Si-based Ge photoelectric devices.

Resistive switching properties of polycrystalline HfO x N y films by plasma-enhanced atomic layer deposition

Polycrystalline HfO x N y films were deposited by plasma-enhanced atomic layer deposition. Bipolar resistive switching properties were observed in the Ag/HfO x N y /Pt devices (Ag-devices) which had stable SET/RESET voltages and high high/low resistance ratios of ~105. Pt/HfO x N y /Pt structured devices (Pt-devices) was prepared for comparison. The current–voltage characterizations and resistance temperature coefficients measurement suggested that the resistance switching is dominated by formation and rupture of Ag filaments for the Ag-devices, and is governed by formation and annihilation of oxygen vacancies for the Pt-devices. HfO x N y films are promising in the application of electrochemical metallization memories.

Low-temperature formation of GeSn nanocrystallite thin films by sputtering Ge on self-assembled Sn nanodots on SiO2/Si substrate

A simple method to form GeSn nanocrystallite thin films with high Sn composition at low temperature by sputtering Ge on self-assembled Sn nanodots is proposed. During the sputtering process, Ge atoms diffuse into Sn nanodots and then nanocrystalline GeSn freezes out as temperature is above 150 °C. GeSn nanocrystallite thin films with high Sn composition of 27.3% are achieved at 150 °C and Sn composition decreases gradually with elevation of temperature. The hole mobility of the GeSn nanocrystallite thin film of 14.0 cm2V−1s−1 is achieved with the process temperature of less than 275 °C, which is suitable for flexible electronics.

Room Temperature Electroluminescence from Tensile-Strained Si0.13Ge0.87/Ge Multiple Quantum Wells on a Ge Virtual Substrate

Direct band electroluminescence (EL) from tensile-strained Si0.13Ge0.87/Ge multiple quantum wells (MQWs) on a Ge virtual substrate (VS) at room temperature is reported herein. Due to the competitive result of quantum confinement Stark effect and bandgap narrowing induced by tensile strain in Ge wells, electroluminescence from Γ1-HH1 transition in 12-nm Ge wells was observed at around 1550 nm. As injection current density increases, additional emission shoulders from Γ2-HH2 transition in Ge wells and Ge VS appeared at around 1300–1400 nm and 1600–1700 nm, respectively. The peak energy of EL shifted to the lower energy side superquadratically with an increase of injection current density as a result of the Joule heating effect. During the elevation of environmental temperature, EL intensity increased due to a reduction of energy between L and Γ valleys of Ge. Empirical fitting of the relationship between the integrated intensity of EL (L) and injection current density (J) with L~Jm shows that the m factor increased with injection current density, suggesting higher light emitting efficiency of the diode at larger injection current densities, which can be attributed to larger carrier occupations in the Γ valley and the heavy hole (HH) valance band at higher temperatures.

Simulation of the effects of defects in low temperature Ge buffer layer on dark current of Si-based Ge photodiodes

The influence of defects in low temperature Ge layer on electrical characteristics of p-Ge/i-Ge/n-Si and n-Ge/i-Ge/p-Ge photodiodes (PDs) was studied. Due to a two-step growth method, there are high defect densities in low-temperature buffer Ge layer. It is shown that the defects in low-temperature Ge layer change the band diagrams and the distribution of electric field, leading to the increase of the total dark current for p-Ge/i-Ge/n-Si PDs, whereas these defects have no influence on the dark current for n-Ge/i-Ge/p-Ge PDs. As a complement, a three-dimensional simulation of the total current under illumination was also performed.

Formation of high-Sn content polycrystalline GeSn films by pulsed laser annealing on co-sputtered amorphous GeSn on Ge substrate*

Polycrystalline Ge1−x (poly-Ge1−x Sn x ) alloy thin films with high Sn content (> 10%) were fabricated by cosputtering amorphous GeSn (a-GeSn) on Ge (100) wafers and subsequently pulsed laser annealing with laser energy density in the range of 250 mJ/cm2 to 550 mJ/cm2. High quality poly-crystal Ge0.90Sn0.10 and Ge0.82Sn0.18 films with average grain sizes of 94 nm and 54 nm were obtained, respectively. Sn segregation at the grain boundaries makes Sn content in the poly-GeSn alloys slightly less than that in the corresponding primary a-GeSn. The crystalline grain size is reduced with the increase of the laser energy density or higher Sn content in the primary a-GeSn films due to the booming of nucleation numbers. The Raman peak shift of Ge–Ge mode in the poly crystalline GeSn can be attributed to Sn substitution, strain, and disorder. The dependence of Raman peak shift of the Ge–Ge mode caused by strain and disorder in GeSn films on full-width at half-maximum (FWHM) is well quantified by a linear relationship, which provides an effective method to evaluate the quality of poly-Ge1−x Sn x by Raman spectra.