Gvidas Astromskas

InAs nanowire metal-oxide-semiconductor capacitors

We present a capacitance-voltage study for arrays of vertical InAs nanowires. Metal-oxide-semiconductor (MOS) capacitors are obtained by insulating the nanowires with a conformal 10nm HfO2 layer and using a top Cr∕Au metallization as one of the capacitor’s electrodes. The described fabrication and characterization technique enables a systematic investigation of the carrier density in the nanowires as well as of the quality of the MOS interface.

Doping Incorporation in InAs nanowires characterized by capacitance measurements

Sn and Se doped InAs nanowires are characterized using a capacitance-voltage technique where the threshold voltages of nanowire capacitors with different diameter are determined and analyzed using an improved radial metal-insulator-semiconductor field-effect transistor model. This allows for a separation of doping in the core of the nanowire from the surface charge at the side facets of the nanowire. The data show that the doping level in the InAs nanowire can be controlled on the level between 2×1018 to 1×1019 cm−3, while the surface charge density exceeds 5×1012 cm−2 and is shown to increase with higher dopant precursor molar fraction.

InAs hole inversion and bandgap interface state density of 2 x 10(11) cm(-2) eV(-1) at HfO2/InAs interfaces

High-k/InAs interfaces have been manufactured using InAs surface oxygen termination and low temperature atomic layer deposition of HfO2. Capacitance–voltage (C–V) curves revert to essentially classical shape revealing mobile carrier response in accumulation and depletion, hole inversion is observed, and predicted minority carrier response frequency in the hundred kHz range is experimentally confirmed; reference samples using conventional techniques show a trap dominated capacitance response. C–V curves have been fitted using advanced models including nonparabolicity and Fermi-Dirac distribution. For an equivalent oxide thickness of 1.3 nm, an interface state density Dit = 2.2 × 1011 cm−2 eV−1 has been obtained throughout the InAs bandgap.

Analysing the capacitance-voltage measurements of vertical wrapped-gated nanowires.

The capacitance of arrays of vertical wrapped-gate InAs nanowires is analysed. With the help of a Poisson-Schrödinger solver, information about the doping density can be obtained directly. Further features in the measured capacitance-voltage characteristics can be attributed to the presence of surface states as well as the coexistence of electrons and holes in the wire. For both scenarios, quantitative estimates are provided. It is furthermore shown that the difference between the actual capacitance and the geometrical limit is quite large, and depends strongly on the nanowire material.

20 GHz Wavelet Generator Using a Gated Tunnel Diode

We demonstrate the use of a GaAs-AlGaAs gated tunnel diode (GTD) in an ultra-wideband (UWB) wavelet generator. An inductor is integrated to form an oscillator circuit, which is driven by the negative differential conductance property of a GTD. It is demonstrated that as the gate tunes the magnitude of the output conductance, the oscillator may be switched on and off, creating short RF pulses. The shortest pulses generated are 500 ps long, the highest output power for the free running oscillator is -4.1 dBm, and the highest oscillation frequency is 22 GHz. Analytical expressions based on the van der Pol equation describing the pulse length and amplitude are presented. This technique is applicable for high frequency impulse radio UWB implementations.

Transient studies on InAs/HfO2 nanowire capacitors

Single-shot transients and deep-level transient spectroscopy are used to investigate the origins of capacitance hysteresis in n-doped InAs nanowire/HfO2 capacitors. Capacitance transients with a characteristic time in the order of 100 μs are attributed to emission from electron traps, located in the oxide film. The trap energy is determined to be in the range from 0.12 to 0.17 eV with capture cross-sections of about 1.7×10−17 cm−2. The capture is measured to be shorter than 100 ns with no sign of capture barrier. Under the reverse bias, the transients show a reduced emission rate indicating a minority carrier assisted complex dynamics.

60 GHz wavelet generator for impulse radio applications

A wavelet generator producing 100 ps short pulses at 60 GHz is presented. The wavelet generator consists of a gated tunnel diode (GTD) integrated in parallel with an inductor. This forms a negative differential conductance (NDC) oscillator with the ability to switch the NDC property on and off, which makes it possible to generate short pulses. In the experiments described, the wavelet generator drives a 50 Ω load and delivers 206 mVpp when generating 97 ps short pulses at 60 GHz. It is demonstrated that it is possible to generate pulses of different length and phase. An explanation of the almost instantaneously startup and decay lapse of the oscillator, including generation of signals with opposite phase, is presented. This novel circuit may find use in ultra-wideband impulse radio communication.

Thin InAs membranes and GaSb buffer layers on GaAs(001) substrates

Thin InAs layers and membranes are fabricated on GaAs substrates using GaSb buffer layers grown by MOVPE. The quality of the GaSb buffer layers is optimized and epitaxial InAs layers are grown on GaSb layers of various thickness. The best GaSb buffer layers are obtained for a nucleation temperature of 450 °C and a subsequent growth temperature of 570 °C with a V/III ratio of 3, as confirmed by both the structural (high-resolution XRD, AFM) and electrical (Hall) measurements. Furthermore, a clear relationship between the structural quality of the GaSb and InAs layers is established. Finally, free-standing InAs structures are fabricated where Hall measurements reveal a mobility that depends on the film thickness.

Electrical characterization of thin InAs films grown on patterned W∕GaAs substrates

InAs has been grown on W–GaAs patterned substrates using metal organic vapor phase epitaxy. It is shown that the W pattern guides the nucleation of the InAs on the GaAs substrate and that the islands formed may be used to embed metal features in a hybrid InAs∕GaAs structure. A lower resistance (factor of 2) was measured for the hybrid structures as compared to reference structures. The reduction in the resistance is attributed to an increased carrier concentration as observed from Hall measurements on devices with different tungsten densities. Cross-sectional transmission electron microscopy investigations reveal a void-free overgrowth above the metal despite the large mismatch of the InAs∕GaAs system.

Heterogeneous integration of InAs on W/GaAs by MOVPE

InAs has been grown on W-GaAs patterned substrates using MOVPE. The selectivity of the growth and the nucleation process has been studied as a function of the temperature and the V/III-ratio in the MOVPE reactor. It is shown that the W guides the nucleation of the InAs on the GaAs and that the islands formed may be used to embed metal features in a hybride InAs/GaAs structure in agreement with previous overgrowth studies of W-InAs and W-GaAs. The electrical properties has also been evaluated demonstrating a reduction of resistance by a factor 5 for a hybride structure with an embedded grating as compared to an InAs/GaAs reference sample.