Kristian Storm

Spatially resolved Hall effect measurement in a single semiconductor nanowire

Efficient light-emitting diodes and photovoltaic energy-harvesting devices are expected to play an important role in the continued efforts towards sustainable global power consumption. Semiconductor nanowires are promising candidates as the active components of both light-emitting diodes and photovoltaic cells, primarily due to the added freedom in device design offered by the nanowire geometry. However, for nanowire-based components to move past the proof-of-concept stage and be implemented in production-grade devices, it is necessary to precisely quantify and control fundamental material properties such as doping and carrier mobility. Unfortunately, the nanoscale geometry that makes nanowires interesting for applications also makes them inherently difficult to characterize. Here, we report a method to carry out Hall measurements on single core-shell nanowires. Our technique allows spatially resolved and quantitative determination of the carrier concentration and mobility of the nanowire shell. As Hall measurements have previously been completely unavailable for nanowires, the experimental platform presented here should facilitate the implementation of nanowires in advanced practical devices.

Realizing Lateral Wrap-Gated Nanowire FETs: Controlling Gate Length with Chemistry Rather than Lithography.

An important consideration in miniaturizing transistors is maximizing the coupling between the gate and the semiconductor channel. A nanowire with a coaxial metal gate provides optimal gate-channel coupling but has only been realized for vertically oriented nanowire transistors. We report a method for producing laterally oriented wrap-gated nanowire field-effect transistors that provides exquisite control over the gate length via a single wet etch step, eliminating the need for additional lithography beyond that required to define the source/drain contacts and gate lead. It allows the contacts and nanowire segments extending beyond the wrap-gate to be controlled independently by biasing the doped substrate, significantly improving the subthreshold electrical characteristics. Our devices provide stronger, more symmetric gating of the nanowire, operate at temperatures between 300 and 4 K, and offer new opportunities in applications ranging from studies of one-dimensional quantum transport through to chemical and biological sensing.

Doping Incorporation in InAs nanowires characterized by capacitance measurements

Sn and Se doped InAs nanowires are characterized using a capacitance-voltage technique where the threshold voltages of nanowire capacitors with different diameter are determined and analyzed using an improved radial metal-insulator-semiconductor field-effect transistor model. This allows for a separation of doping in the core of the nanowire from the surface charge at the side facets of the nanowire. The data show that the doping level in the InAs nanowire can be controlled on the level between 2×1018 to 1×1019 cm−3, while the surface charge density exceeds 5×1012 cm−2 and is shown to increase with higher dopant precursor molar fraction.

A Comparative Study of Absorption in Vertically and Laterally Oriented InP Core-Shell Nanowire Photovoltaic Devices.

We have compared the absorption in InP core-shell nanowire p-i-n junctions in lateral and vertical orientation. Arrays of vertical core-shell nanowires with 400 nm pitch and 280 nm diameter, as well as corresponding lateral single core-shell nanowires, were configured as photovoltaic devices. The photovoltaic characteristics of the samples, measured under 1 sun illumination, showed a higher absorption in lateral single nanowires compared to that in individual vertical nanowires, arranged in arrays with 400 nm pitch. Electromagnetic modeling of the structures confirmed the experimental observations and showed that the absorption in a vertical nanowire in an array depends strongly on the array pitch. The modeling demonstrated that, depending on the array pitch, absorption in a vertical nanowire can be lower or higher than that in a lateral nanowire with equal absorption predicted at a pitch of 510 nm for our nanowire geometry. The technology described in this Letter facilitates quantitative comparison of absorption in laterally and vertically oriented core-shell nanowire p-i-n junctions and can aid in the design, optimization, and performance evaluation of nanowire-based core-shell photovoltaic devices.

Study of carrier concentration in single InP nanowires by luminescence and Hall measurements.

The free electron carrier concentrations in single InP core-shell nanowires are determined by micro-photoluminescence, cathodoluminescence (CL) and Hall effect measurements. The results from luminescence measurements were obtained by solving the Fermi-Dirac integral, as well as by analyzing the peak full width at half maximum (FWHM). Furthermore, the platform used for Hall effect measurements, combined with spot mode CL spectroscopy, is used to determine the carrier concentrations at specific positions along single nanowires. The results obtained via luminescence measurements provide an accurate and rapid feedback technique for the epitaxial development of doping incorporation in nanowires. The technique has been employed on several series of samples in which growth parameters, such as V/III-ratio, temperature and dopant flows, were investigated in an optimization procedure. The correlation between the Hall effect and luminescence measurements for extracting the carrier concentration of different samples were in excellent agreement.

Electrical and optical properties of InP nanowire ensemble p⁺-i-n⁺ photodetectors.

We report on a comprehensive study of electrical and optical properties of efficient near-infrared p⁺-i-n⁺ photodetectors based on large ensembles of self-assembled, vertically aligned i-n⁺ InP nanowires monolithically grown on a common p⁺ InP substrate without any buffer layer. The nanowires have a polytype modulated crystal structure of wurtzite and zinc blende. The electrical data display excellent rectifying behavior with an ideality factor of about 2.5 at 300 K. The ideality factor scales with 1/T, which possibly reflects deviations from classical transport models due to the mixed crystal phase of the nanowires. The observed dark leakage current is of the order of merely ∼100 fA/nanowire at 1 V reverse bias. The detectors display a linear increase of the photocurrent with reverse bias up to about 10 pA/nanowire at 5 V. From spectrally resolved measurements, we conclude that the photocurrent is primarily generated by funneling photogenerated carriers from the substrate into the NWs. Contributions from direct excitation of the NWs become increasingly important at low temperatures. The photocurrent decreases with temperature with an activation energy of about 50 meV, which we discuss in terms of a temperature-dependent diffusion length in the substrate and perturbed transport through the mixed-phase nanowires.

Synthesis of Doped InP Core–Shell Nanowires Evaluated Using Hall Effect Measurements

InP core-shell nanowire pn-junctions doped with Zn and Sn have been investigated in terms of growth morphology and shell carrier concentration. The carrier concentrations were evaluated using spatially resolved Hall effect measurements and show improved homogeneity compared to previous investigations, attributed to the use of Sn as the n-type dopant. Anisotropies in the growth rate of different facets are found for different doping levels that in turn affects the migration of Sn and In on the nanowire surface. A route for increasing the In migration length to obtain a more homogeneous shell thickness is presented.

InAs Nanowire Transistors with Multiple, Independent Wrap-Gate Segments.

We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a key advantage to this new approach, and the horizontal orientation more generally, is that achieving more than two wrap-gate segments then requires no extra fabrication steps. This is in contrast to the vertical orientation, where a significant subset of the fabrication steps needs to be repeated for each additional gate. We show that cross-talk between adjacent wrap-gate segments is negligible despite separations less than 200 nm. We also demonstrate the ability to make multiple wrap-gate transistors on a single nanowire using the exact same process. The excellent scalability potential of horizontal wrap-gate nanowire transistors makes them highly favorable for the development of advanced nanowire devices and possible integration with vertical wrap-gate nanowire transistors in 3D nanowire network architectures.

Conductance Enhancement of InAs/InP Heterostructure Nanowires by Surface Functionalization with Oligo(phenylene vinylene)s

We have investigated the electronic transport through 3 μm long, 45 nm diameter InAs nanowires comprising a 5 nm long InP segment as electronic barrier. After assembly of 12 nm long oligo(phenylene vinylene) derivative molecules onto these InAs/InP nanowires, we observed a pronounced, nonlinear I-V characteristic with significantly increased currents of up to 1 μA at 1 V bias, for a back-gate voltage of 3 V. As supported by our model calculations based on a nonequilibrium Green Function approach, we attribute this effect to charge transport through those surface-bound molecules, which electrically bridge both InAs regions across the embedded InP barrier.

Gate-induced fermi level tuning in InP nanowires at efficiency close to the thermal limit.

As downscaling of semiconductor devices continues, one or a few randomly placed dopants may dominate the characteristics. Furthermore, due to the large surface-to-volume ratio of one-dimensional devices, the position of the Fermi level is often determined primarily by surface pinning, regardless of doping level. In this work, we investigate the possibility of tuning the Fermi level dynamically with wrap-around gates, instead of statically setting it using the impurity concentration. This is done using Ω-gated metal-oxide-semiconductor field-effect transistors with HfO(2)-capped InP nanowires as channel material. It is found that induced n-type devices exhibit an optimal inverse subthreshold slope of 68 mV/decade. By adjusting the growth and process parameters, it is possible to produce ambipolar devices, in which the Fermi level can be tuned across the entire band gap, making it possible to induce both n-type and p-type conduction.