H. Hussin

Optimization in fabricating 90nm NMOS transistors using Silvaco

In this paper, a 90 nm NMOS was designed and fabricate to study its electrical characteristics. ATHENA and ATLAS module of SILVACO software are the tools used in simulating the electrical performance of the transistor. The parameters under investigation were the VTH, Id-Vg and Id-Vd relationship. From the simulation result, it was shown that the gate oxide thickness, channel doping, VTH adjust implant and the dosage of halo implantation were contribute in determining the VTH value and Id-Vg curve. From the simulation result, optimum solution is found in which VTH value of 0.2685 is achieved. The value is in line with ITRS guideline for 90 nm device.

Electrical properties of a-C thin film deposited using methane gas as precursor

Amorphous carbon (a-C) thin films were deposited on quartz substrate at various temperatures with thermal chemical vapor deposition (CVD) technique using methane gas as precursor. The deposited a-C thin films were characterized by Current Voltage (I–V) Measurement and UV-VIS-NIR Spectrophotometer. In this experiment, the pyrolysis process was successful to analyse the electrical and optical properties of a-C thin films deposited by thermal CVD using methane gas. The a-C films properties are found to significantly vary with the deposition temperatures. At higher deposition temperature, the resistivity is lower and thus gives the conductivity of a-C thin films increased due to the relation between the resistivity and conductivity are inversely proportional.

Preparation of pyrolyzed a-C thin films using methane as precursor

Amorphous carbon thin films have been grown on quartz substrates by an economical and simple technique, thermal CVD system with methane as starting material. Since, the decomposition of methane required high thermal energy, thus the deposition temperatures were varied from 700–1000°C. The formation of a-C thin films and its properties were characterized using UV-Vis Spectrophotometer and Advantest R6243 DC Voltage Current Source/Monitor and SemiPro Curve Software.

Influence of increasing deposition temperature on opto-electrical properties of amorphous carbon thin film

Amorphous carbon (a-C) thin films were deposited on silicon (Si) substrate by pyrolysing camphor oil at various temperatures with thermal chemical vapor deposition (CVD) technique. The deposited a-C thin films were characterized by Current-Voltage (I-V) Measurement and UV-VIS-NIR Spectrophotometer. The electrical and optical properties of these films have been studied. It was found that increasing deposition temperature had influence on the a-C thin films properties. In addition the carrier gas flow showed a secondary impact on the properties of a-C thin films. The resistivity of a-C thin films decreases when the deposition temperature increases. However, at higher deposition temperature the conductivity increases due to the formation of more disorder sp2 carbon site.

An effective approach to improve students' grade point average

MyUiTM Engineer is a program especially designed for students in semester 5 with a cumulative grade point average (CGPA) below 3.0 at the Faculty of Electrical, Universiti Teknologi MARA, Shah Alam. The aim of the program is to produce high quality electrical and electronic engineering graduates in Malaysia. This paper discusses the methodology and approach implemented in MyUiTM Engineer program in order to improve electrical and electronic engineering students grade point average (GPA). There were no specific methods used in this program. The approach used more toward students motivation. The results show that most of the students who joined this program had improved their academic performance. 23.1% of students able to get their GPA above 3.0 while 63.7% students improved their GPA as compared with previous semester. This has proved that MyUiTM Engineer program offered by the Faculty of Electrical Engineering, Universiti Teknologi MARA is of high quality especially to produce competent electrical and electronic engineers.

Design and implementation of blended learning model in Semiconductor Device course

There has been a paradigm shift in the modern teaching and learning method from face-to-face to blended learning style. However, most of the lecturers having difficulty in determining whether the blended learning style can be used as one of the approach to increase the student understanding on the engineering subject. Aiming to explore the effectiveness of blended learning model in engineering subjects, an innovative blended learning model was designed and implemented in the Semiconductor Device course to increase student achievement in this subject. The blended learning model implemented in this research integrate face-to-face, E-learning, groupwork and self-work. A survey and final examination results were used to evaluate the effectiveness of each of the teaching and learning activities implemented for this subject. It was found that a minimum of 10 students agreed that face-to-face module consists of tutorial and lecture together with mind map and on-line assignment were the most effective method for the students. Less than 4 students agreed that a Java applet and video is most effective. The results of the comparative study show the effectiveness of the proposed model. 15% of the students from this semester score A compared to previous student with only 7% score A in this course. The failure rate also reduced from 10% to 2% by implementing this blended learning model.