Maizan Muhamad

Optimization in fabricating 90nm NMOS transistors using Silvaco

In this paper, a 90 nm NMOS was designed and fabricate to study its electrical characteristics. ATHENA and ATLAS module of SILVACO software are the tools used in simulating the electrical performance of the transistor. The parameters under investigation were the VTH, Id-Vg and Id-Vd relationship. From the simulation result, it was shown that the gate oxide thickness, channel doping, VTH adjust implant and the dosage of halo implantation were contribute in determining the VTH value and Id-Vg curve. From the simulation result, optimum solution is found in which VTH value of 0.2685 is achieved. The value is in line with ITRS guideline for 90 nm device.

Design of CMOS differential LNA at 2.4GHz

This paper present design and simulation of differential low noise amplifier that utilized inductively degenerated common-source (CS) open drain cascode topology. The operating frequency for the design was at 2.4GHz for IEEE 802.11b standard. The LNA has been implemented in RF 0.13um CMOS process. Power constraint noise optimization method has been used to obtain the optimized width of the transistor with a low noise figure and good power gain. Post layout simulation provides a forward gain (S21) of 18.56dB, S11 of -27.63dB with a noise figure (NF) of 1.85dB and IIP3 = -7.75. The total current consumed by the circuit is 7.59mA thus making the power consumption is 9mW.

Electrical properties of a-C thin film deposited using methane gas as precursor

Amorphous carbon (a-C) thin films were deposited on quartz substrate at various temperatures with thermal chemical vapor deposition (CVD) technique using methane gas as precursor. The deposited a-C thin films were characterized by Current Voltage (I–V) Measurement and UV-VIS-NIR Spectrophotometer. In this experiment, the pyrolysis process was successful to analyse the electrical and optical properties of a-C thin films deposited by thermal CVD using methane gas. The a-C films properties are found to significantly vary with the deposition temperatures. At higher deposition temperature, the resistivity is lower and thus gives the conductivity of a-C thin films increased due to the relation between the resistivity and conductivity are inversely proportional.

A 0.13µm inductively degenerated cascode CMOS LNA at 2.14GHz

A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is −19 dB.

Influence of increasing deposition temperature on opto-electrical properties of amorphous carbon thin film

Amorphous carbon (a-C) thin films were deposited on silicon (Si) substrate by pyrolysing camphor oil at various temperatures with thermal chemical vapor deposition (CVD) technique. The deposited a-C thin films were characterized by Current-Voltage (I-V) Measurement and UV-VIS-NIR Spectrophotometer. The electrical and optical properties of these films have been studied. It was found that increasing deposition temperature had influence on the a-C thin films properties. In addition the carrier gas flow showed a secondary impact on the properties of a-C thin films. The resistivity of a-C thin films decreases when the deposition temperature increases. However, at higher deposition temperature the conductivity increases due to the formation of more disorder sp2 carbon site.

Design of transformer-less DC to AC converter using PWM technique

This paper presents a method of power conversion circuit topology for single-phase DC to AC boost converter by using sinusoidal pulse-width modulation (SPWM) technique. The presented circuit converter does not use a transformer to step up the voltage instead it use DC to DC boost converter and expected to be more efficient and lower cost compare with conventional converter in the market. The circuit contains of DC to DC booster and a full bridge converter. It can provide a low distortion AC output voltage regulation. The circuit achieved higher efficiency and together with minimum switching losses by using the proposed technique that was capable of making inverter achieves single power translation. The low pass filter circuit was implemented at the end output to minimize the total harmonic distortion. This paper has successfully achieved to design transformer-less converter and with low total harmonic distortion which good for electronic application. To complete the design of three circuits which are DC/DC booster, converter circuit and LC filter has been combined to produce 12Vdc to 230Vac with low THD. MATLAB/SIMULINK is one of the powerful tools that has been used for Simulation in this project, in order to show the validity of the theory and simulation.

On-wafer scattering parameter characterization of differential four-port networks LNA using two-port vector network analyzer

This paper presents a technique that enables very accurate measurement for S-parameter of differential low noise amplifier by means of a standard two-port vector network analyzer (VNA). This technique involves by terminating two ports at one time while another two ports are measured. Accurate characterization of a two port device requires a four-port vector network analyzer, which might be not easily available. Thus, it is a common practice to terminate the two of the four ports to be used which the conventional/standard two port VNA. Even though the above approach is applicable but the reliability and conformity of the test method is still limited and uncertain. For verification, the measurement using four-port VNA have been conducted to test the devices S-parameters are accurately similar with the two port network. The fabricated on-wafer differential LNA structure was tested and measured with normal two-port VNA and also four-port VNA. By using this technique, there is no need to purchase a four-port VNA. By using this technique, any multi-port circuit network can be measured. The LNA has been implemented in RF 0.13um CMOS process. The differential LNA shows the measured performance in term of gain is equal to 17.4 dB. This give the percentage difference of 0.63 compared with measured using four-port VNA. The circuit consume only 9 mW power while dissipating 7.59mA from a 1.8 V supply. Generally, the measured results of the on-wafer fabricated differential LNA show good agreement for both set up.