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Dive into the research topics where H.V. Sorensen is active.

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Featured researches published by H.V. Sorensen.


IEEE Transactions on Signal Processing | 1993

Efficient computation of the DFT with only a subset of input or output points

H.V. Sorensen; C.S. Burrus

Ways of efficiently computing the discrete Fourier transform (DFT) when the number of input and output data points differ are discussed. The two problems of determining whether the length of the input sequence or the length of the output sequence is reduced can be found to be duals of each other, and the same methods can, to a large extent, be used to solve both. The algorithms utilize the redundancy in the input or output to reduce the number of operations below those of the fast Fourier transform (FFT) algorithms. The usual pruning method is discussed, and an efficient algorithm, called transform decomposition, is introduced. It is based on a mixture of a standard FFT algorithm and the Horner polynomial evaluation scheme equivalent to the one in Goertzels algorithms. It requires fewer operations and is more flexible than pruning. The algorithm works for power-of-two and prime-factor algorithms, as well as for real-input data. >


international symposium on circuits and systems | 1995

Performance of complex noise transfer functions in bandpass and multi band sigma delta systems

P. Aziz; H.V. Sorensen; J. Van der Spiegel

The use of complex noise transfer functions for bandpass sigma delta modulation is described and compared with real transfer functions. For bandpass signals centered at higher frequencies, the use of complex noise transfer functions (NTFs) allows performance improvements over a modulator of the same order using real transfer functions. Results are presented that show the performance improvement possible using complex second order modulators.


international conference on acoustics, speech, and signal processing | 1994

Multi band sigma delta analog to digital conversion

P. Aziz; H.V. Sorensen; J. Van der Spiegel

A multi band approach to oversampled noise shaping analog to digital conversion is described. The multi band A/D converter breaks the signal band into several smaller bands and uses a different band reject noise shaping transfer function for each band. A FIR filter bank attenuates the out-of-band noise for each band and reconstructs the signal. This approach allows performance improvements over conventional noise shaping A/D converters which convert the entire signal band using one noise shaping transfer function. A design example and simulation results where a signal with 512 kHz bandwidth is converted to about 16 bits of resolution is presented.<<ETX>>


international conference on computer communications | 1994

Comparison of priority partition methods for VBR MPEG

Brian DeCleene; P. Pancha; M. El Zarki; H.V. Sorensen

Successful exploitation of prioritized ATM networks requires matching the characteristics of the coded source with the unique properties of the network. This is particularly true for video which is very bandwidth intensive. The authors describe and investigate the performance of three prioritization schemes in terms of the traffic characteristics, SNR, and visual quality. These schemes are further designed such that the high priority data stream is MPEG-I compliant and only a single pass through the encoder is required. A technique for choosing parameter values which achieve a specified high priority traffic bandwidth is presented for two of these schemes. The technique is demonstrated to be remarkably accurate for different video sequences.<<ETX>>


international symposium on circuits and systems | 1993

A non-uniform sampling technique for A/D conversion

N. Sayiner; H.V. Sorensen; Thayamkulangara R. Viswanathan

A signal acquisition technique that will provide a favorable tradeoff between speed and resolution is described. This technique is based on recording the time instants at which the input signal crosses any of the fixed quantization levels and extracting additional information from the nonuniform sample sequence by means of digital signal processing methods. The proposed concepts are verified using both software simulation and board level hardware implementation. The proposed scheme offers significant benefits in the VLSI implementation, mainly in terms of reduced power consumption and smaller chip area.<<ETX>>


midwest symposium on circuits and systems | 1992

A new signal acquisition technique

N. Sayiner; H.V. Sorensen; Thayamkulangara R. Viswanathan

A signal acquisition technique that will result in a high-resolution high-speed analog-to-digital converter architecture is described. The basic idea is to have a simple analog circuit to acquire information about the input signal at high speed and a more complex digital signal processing block to generate a high-resolution digital output. This technique is based on recording the time instants at which the input signal crosses any of a fixed set of quantization levels and extracting additional information from the nonuniform sample sequence using interpolation methods. A board-level design was implemented to verify these principles for real input signals.<<ETX>>


IEEE Transactions on Signal Processing | 1991

A bus-oriented multiprocessor fast Fourier transform

Douglas L. Jones; H.V. Sorensen

A bus-oriented multiprocessor architecture specialized for computation of the discrete Fourier transform (DFT) of a length N=2/sup M/ sequential data stream is developed. The architecture distributes computation and memory requirements evenly among the processors and allows flexibility in the number of processors and in the choice of a fast Fourier transform (FFT) algorithm. With three buses, the bus bandwidth equals the input data rate. A single time-multiplexed bus with a bandwidth of three times the input data rate can alternatively be used. The architecture requires processors that have identical hardware, which makes it more attractive than the cascade (pipeline) FFT for multiprocessor implementation. >


international conference on acoustics, speech, and signal processing | 1990

Efficient FFT algorithms for DSP processors using tensor product decompositions

H.V. Sorensen; C.A. Katz; C.S. Burrus

A new class of FFT (fast Fourier transform) algorithms that run very efficiently on digital signal processors (DSPs) is described. The algorithms are based on a tensor product factorization of the DFT (discrete Fourier transform). The tensor product factorization not only controls the breakdown into short-length DFTs but also shows the data flow between the various blocks. This allows a better scheduling of operations, which again gives a better utilization of the DSP pipelining/parallel capabilities, and leads to algorithms with significantly lower overhead than traditional methods. Several different programs have been implemented in assembly code for the TMS320C30 and simulated to find their execution times. The new algorithms are shown to be more than 20% faster than traditional sequential algorithms adapted to the processor, because of lower overhead, and better utilization of the parallel instruction sets and the pipelining is obtained.<<ETX>>


international conference on acoustics, speech, and signal processing | 1992

An efficient FFT algorithm for real-symmetric data

Jianping Chen; H.V. Sorensen

A very efficient algorithm for computing the discrete Fourier transform (DFT) of real-symmetric input is presented. The algorithm is based on Bruuns algorithm where, except for the last stage, all twiddle factors are purely real. It is well-known that about half of the arithmetic operations and memory requirements can be removed when the input is real-valued. It may be assumed that another half of the computational and memory requirements can be eliminated when the input is real and symmetric. This is, however, impossible with a standard radix-2 fast Fourier transform (FFT), but can be achieved by the Bruun algorithm. The symmetries within the algorithm with for real-symmetric input are exploited to remove about three fourths of the butterflies and memory locations. The algorithm presented achieves the same low arithmetic as the split-radix FFT for real-symmetric data, but has a structure that is as simple as the radix-2. The implementation on the TMS320C30 shows that the new algorithm fits a DSP processor very well. The program requires 0.51-0.60 ms to compute a length 1024 FFT with real-symmetric data.<<ETX>>


international conference on acoustics, speech, and signal processing | 1993

Multiresolution vector transform coding for video compression

Brian DeCleene; H.V. Sorensen

A novel image and video compression algorithm based on block and vector transformations used in a multiresolution approach is described. The algorithm is shown to yield substantial compression gains over regular block coding with only a small increase in the computational load. In particular, the transform efficiency on a first-order Markov process is demonstrated to exceed that of a block transformation and approach the efficiency of the full transformation as the correlation factor approaches unity. Experiments with real video data also illustrate the compression gains for a variety of vector transformations, including vector DCT (discrete cosine transform) and vector Hadamard. Combined with an inherent robustness to vector loss, the proposed transformation is very well suited for applications requiring low bit rates over a degraded channel such as packet video during network congestion.<<ETX>>

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Brian DeCleene

University of Pennsylvania

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N. Sayiner

University of Pennsylvania

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P. Aziz

University of Pennsylvania

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C.A. Katz

University of Pennsylvania

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C.W. Kim

University of Pennsylvania

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Jianping Chen

University of Pennsylvania

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M. El Zarki

University of Pennsylvania

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P. Pancha

University of Pennsylvania

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