Haijun Wan

Endurance enhancement of Cu-oxide based resistive switching memory with Al top electrode

We investigated the switching performance of Cu-oxide films with Al, Pt, and Ti electrodes. Compared with Pt electrode, the Al electrode shows better stability, preferable endurance, and larger resistance ratio. An interface AlOx layer is detected by transmission electron microscopy and Auger electron spectroscopy. This layer can strongly affect the movement of oxygen vacancies. However, the sample with pure Ti electrode almost has no switching characteristics. Ti/TiN electrode with thin Ti exhibits good switching behavior. The thickness control of Ti layer is quite critical. So we suggest that the oxygen diffusion in electrode is another important factor for switching performance.We investigated the switching performance of Cu-oxide films with Al, Pt, and Ti electrodes. Compared with Pt electrode, the Al electrode shows better stability, preferable endurance, and larger resistance ratio. An interface AlOx layer is detected by transmission electron microscopy and Auger electron spectroscopy. This layer can strongly affect the movement of oxygen vacancies. However, the sample with pure Ti electrode almost has no switching characteristics. Ti/TiN electrode with thin Ti exhibits good switching behavior. The thickness control of Ti layer is quite critical. So we suggest that the oxygen diffusion in electrode is another important factor for switching performance.

In Situ Observation of Compliance-Current Overshoot and Its Effect on Resistive Switching

The compliance-current dependence of the resistive-switching behaviors is investigated in TaN/Cu<i>x</i>O/Cu memory devices with 1R architecture and 1T1R architecture, respectively. The correlation of reset current <i>I</i> _reset and on-state resistance <i>R</i> _on can be verified by adjusting the compliance current <i>I</i> _comp. Meanwhile, <i>I</i> _reset and <i>R</i> _on become independent on <i>I</i> _comp in the 1R architecture when <i>I</i> _comp is below 1 mA. A serious compliance-current overshoot phenomenon is <i>in situ</i> observed in 1R-architecture device, and it remarkably affects the resistive-switching characteristics because the compliance current dominates the memory behaviors. Therefore, resistive-switching investigation based on 1T1R architecture is much more reliable.

Role of TaON interface for CuxO resistive switching memory based on a combined model

For the embedded application of the resistive switching memory using Cu x O films, the controllable switching polarity and optimized low resistance state was investigated. Stable bipolar switching behavior was demonstrated for the TaN / Cu x O / Cu device. TaON was observed at the anode interface by x-ray photoelectron spectroscopy and transmission electron microscopy, which is believed to play a key role in the resistance transition. The physics behind this phenomenon of reactive top-electrode is revealed. A filament/charges trapped combined model is proposed to clarify the electrical characteristics of the top-electrode/oxide reactions. This observation presents a unique opportunity to elucidate a universal mechanism for the resistive switching of transitional metal oxides.

Improvement of Resistive Switching Uniformity by Introducing a Thin GST Interface Layer

Broad dispersions of operation parameters are generally observed with continuous resistive switching. In this letter, we explore a prototype resistive random access memory (RRAM) device for switching uniformity improvement. Compared with Al/CuxO/Cu structure, by introducing a thin phase-change Ge2Sb2Te5 (GST) film between CuxO and Al top electrode, the device exhibits much better resistive hysteresis and switching uniformity. A combined filamentary conduction model is proposed to clarify the role of GST layer on the resistive switching stabilization.

Retention-failure mechanism of TaN∕CuxO∕Cu resistive memory with good data retention capability

Data retention characteristics and a failure mechanism of TaN∕CuxO∕Cu resistive memory device are investigated by a temperature-accelerated test method. Data retention capability at 85°C is sufficiently longer than 10years by using two different methods: simple extrapolation and Arrhenius equation. The high resistance state fails to low resistance state and low resistance state fails to high resistance state at the elevated temperature. It is attributed that different retention-failure mechanisms are responsible for high resistance state and low resistance state, respectively. A filament/charge trapped combined model is presented to clarify the retention-failure mechanism.

Properties of p-n heterojunction diode based on Ge2Sb2Te5 and its application for phase change random access memory

Heterojunction diodes are fabricated using p-type Ge2Sb2Te5 and low doped n-type silicon wafer. Rectification is observed with a ratio of forward-to-reverse current as high as 104 and 103 for crystal-Ge2Sb2Te5/n-Si junction and amorphous-Ge2Sb2Te5/n-Si junction, respectively. The approximate equilibrium energy-band diagrams for both crystal-Ge2Sb2Te5/n-Si heterojunction diodes and amorphous-Ge2Sb2Te5/n-Si heterojunction diodes are proposed to explain the properties of the p-Ge2Sb2Te5/n-Si heterojunction diode. Properties of a p-n heterojunction diode based on Ge2Sb2Te5 are proposed to apply in 0T1R cross-point structure array for reliable read operation and for decreasing the sneaking current.

Electrical and testing reliability of Cu x O based RRAM

This work studies the electrical and testing reliability issues of CuxO based RRAM (Resistive Random Access Memory). Firstly, we study the most important electrical reliability issue-data retention capability, and propose a filament/charge trap combined model to clarify the retention failure mechanism. Secondly, we respectively study the reliability problems caused by the SET compliance current in 1R-architecture and 1T1R-architecture devices during the electrical testing, and observe the compliance current overshoot phenomenon for the first time in 1R-architecture device by using a self-build compliance current capturing system.

A Systematic Investigation of TiN/CuxO/Cu RRAM with Long Retention and Excellent Thermal Stability

The long retention, more than 10 years at 85degC, and excellent thermal reliability memory of TiN-Cu x O-Cu (with TiN cap layer as top electrode) is reported. TiN cap layer results in more stable reset from low resistance state (LRS) to high resistance state (HRS) under positive pulse and SET under negative pulse, which is beneficial for providing large programming current or voltage on the resistive random access memory (RRAM) resistor connected in series with a select transistor. Results show that the structure of TiN-Cu x O-Cu with its compatibility to CMOS technology appears a promising memory device for embedded application.

A Cu x O-based resistive memory with low power and high reliability for SOC nonvolatile memory applications

A CuxO-based resistive memory is successfully integrated in 0.13µm logic process. Operation algorithm is optimized to achieve low power consumption with reset current down to 30 µA. High thermal stability and small cell size less than 22F2 have been demonstrated. The advantages make this device promising for system on chip non-volatile memory applications.