Herbert Zirath

Science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems

We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.

A new empirical nonlinear model for HEMT and MESFET devices

A large-signal model for HEMTs and MESFETs, capable of modeling the current-voltage characteristic and its derivatives, including the characteristic transconductance peak, gate-source and gate-drain capacitances, is proposed. Model parameter extraction is straightforward and is demonstrated for different submicron gate-length HEMT devices including different delta -doped pseudomorphic HEMTs on GaAs and lattice matched to InP, and a commercially available MESFET. Measured and modeled DC and S-parameters are compared and found to coincide well. >

The Odin satellite - I. Radiometer design and test

The Sub-millimetre and Millimetre Radiometer (SMR) is the main instrument on the Swedish, Canadian, Finnish and French spacecraft Odin. It consists of a 1.1 metre diameter telescope with four tuneable heterodyne receivers covering the ranges 486-504 GHz and 541-581 GHz, and one fixed at 118.75 GHz together with backends that provide spectral resolution from 150 kHz to 1 MHz. This Letter describes the Odin radiometer, its operation and performance with the data processing and calibration described in Paper II.

Accurate small-signal modeling of HFET's for millimeter-wave applications

In this paper we discuss the small-signal modeling of HFETs at millimeter-wave frequencies. A new and iterative method is used to extract the parasitic components. This method allows calculation of a /spl pi/-network to model the heterojunction field-effect transistor (HFET) pads, thus extending the validity of the model to higher frequencies. Formulas are derived to translate this /spl pi/-network into a transmission line. A new and general cold field-effect transistor (FET) equivalent circuit, including a Schottky series resistance, is used to extract the parasitic resistances and inductances. Finally, a new and compact set of analytical equations for calculation of the intrinsic parameters is presented. The real part of Y/sub 12/ is accounted for in these equations and its modeling is discussed. The accounting of Re(Y/sub 12/) improves the S-parameter modeling. Model parameters are extracted for an InAlAs/InGaAs/InP HFET from measured S-parameters up to 50 GHz, and the validity of the model is evaluated by comparison with measured data at 75-110 GHz.

Design of Varactor-Based Tunable Matching Networks for Dynamic Load Modulation of High Power Amplifiers

In this paper, the design of varactor-based tunable matching networks for dynamic load modulation of high power amplifiers (PAs) is presented. Design guidelines to overcome the common breakdown, and tunability problems of the varactors for high power applications are proposed. Based on the guidelines, using commercially available abrupt junction silicon varactors, a tunable matching network is built and measured. The matching network is then used for load modulation of a 1-GHz 7-W class-E LDMOS PA. Static measurements of the load modulated PA show that the power-added efficiency of the PA is improved by an absolute value of 10% at 10-dB backoff. This promising result proves, for the first time, the feasibility of load modulation techniques for high-power applications in the gigahertz frequency range.

Prediction of IMD in LDMOS transistor amplifiers using a new large-signal model

In this paper, the intermodulation distortion (IMD) behavior of LDMOS transistors is treated. First, an analysis is performed to explain measured IMD characteristics in different classes of operation. It is shown that the turn-on region plays an important role in explaining measured IMD behavior, which may also give a clue to the excellent linearity of LDMOS transistors. Thereafter, with this knowledge, a new empirical large-signal model with improved capability of predicting IMD in LDMOS amplifiers is presented. The model is verified against various measurements at low as well as high frequency in a class-AB power amplifier circuit.

A comprehensive analysis of IMD behavior in RF CMOS power amplifiers

This paper presents a comprehensive analysis of nonlinear intermodulation distortion (IMD) behavior in RF CMOS power amplifiers (PAs). Separate analyses are presented for small- and large-signal operation regimes. Especially, a new, simple, large-signal behavioral IMD analysis method is presented that allows the mechanisms dominant for IMD generation to be identified and their individual contributions to be studied. By combining these analyses, typical IMD versus input power characteristics of MOSFET PAs can be predicted and understood for different classes of operation. Various measurements made on a 950-MHz RF CMOS PA are used to demonstrate typical behavior and validate the proposed theory. Prediction of IMD using a standard CMOS transistor model is also evaluated and is shown to give good agreement with the measurements.

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).

Cryogenic wide-band ultra-low-noise IF amplifiers operating at ultra-low DC power

This paper describes cryogenic broad-band amplifiers with very low power consumption and very low noise for the 4-8-GHz frequency range. At room temperature, the two-stage InP-based amplifier has a gain of 27 dB and a noise temperature of 31 K with a power consumption of 14.4 mW per stage, including bias circuitry. When cooled to 15 K, an input noise temperature of 1.4 K is obtained at 5.7 mW per stage. At 0.51 mW per stage, the input noise increases to 2.4 K. The noise measurements have been repeated at different laboratories using different methods and are found consistent.

An empirical table-based FET model

A new large signal field effect transistor (FET) model combining empirical and table based models was developed and investigated experimentally. The Chalmers empirical model was used as a spline function for the table based model. Combining models improves accuracy and simplifies and speeds extraction. The procedure can be applied for other types of devices.