Han-Sang Song

Development of New TiN/ZrO2/Al2O3/ZrO2/TiN Capacitors Extendable to 45nm Generation DRAMs Replacing HfO2 Based Dielectrics

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was theoretically designed and successfully demonstrated to be applicable to 45nm DRAM devices. ZAZ dielectric film is a combined structure from tetragonal ZrO₂ and amorphous Al ₂O₃. Thus prepared ZAZ TFT capacitors showed very small Tox.eq value of 6.3Aring and low leakage current less than 1fA/cell. It was also confirmed that ZAZ TFT capacitor was thermally robust during backend full thermal process by applying it to the final DRAM product in mass production

The Property of Ta2O5 on Chemical Vapor Deposited Ru Film Fabricated using Tris(2,4-octanedionato)ruthenium for Application to Dynamic Random Access Memory Capacitor

Chemical vapor deposited (CVD) Ru was adopted as a bottom electrode of Ta2O5 capacitor for application to gigabit scale dynamic random access memory (DRAM). Ru film was deposited with the precursor of tris(2,4-octanedionato)ruthenium, Ru(od)3, at 260°C in O2 ambient. We obtained Ru film with 44 µΩ·cm of electric resistivity after annealing at 700°C. The root mean square (RMS) surface roughness of the film was 3.3 nm on SiO2 and 7.4 nm on TiN. We also obtained a leakage current of 4.45×10-9 A/cm2 at 1 V with a SiO2 equivalent thickness of 1.12 nm in the TiN/Ta2O5/Ru capacitor. Double plasma treatment on Ta2O5 was more effective than single plasma treatment for obtaining low leakage current. The TiN layer under Ru was oxidized into TiOx during the rapid thermal process (RTP) annealing of the Ru film at 600°C in N2 ambient. The remaining oxygen in the Ru film is believed to be an oxygen source for the oxidation of TiN.

Properties of Ru Thin Films Fabricated on TiN by Metal-Organic Chemical Vapor Deposition

Ruthenium (Ru) thin films were fabricated on TiN, as well as on SiO2, by metal-organic chemical vapor deposition using tris(2,4-octanedionato)ruthenium. We characterized the Ru films grown on TiN, and compared them with the films prepared on SiO2. The Ru films deposited on TiN showed weak crystallinity and random grain orientation similar to the films on SiO2, but revealed notably rougher surfaces than the films on SiO2. Moreover, deposition rates on TiN were lower than those on SiO2. These properties of the Ru films grown on TiN originated from the difficulties in nucleation and growth at the initial stage of the deposition. The inferior surface flatness and deposition rate could cause structural instability and poor coverage of the Ru electrode at the bottom of a deep concave hole for a three-dimensional capacitor where the Ru film was in contact with a diffusion barrier metal TiN plug.

Fully integrated and functioned 44nm DRAM technology for 1GB DRAM

44 nm feature sized 8F2 1Gb DRAM is fully integrated and functioned for the first time with the smallest cell size of 0.015 um2. A novel cell-transistor structure and new DRAM process technologies are developed. In order to control the threshold voltage uniformity and body-bias sensitivity of saddle-fin cell-transistor, the channel doping profile and saddle-fin geometric dependency were analytically expressed with experimental data. The weak fin height dependency on cell-VT diminishes the burden of the saddle-fin patterning processes. And the low body-bias sensitivity of the saddle-fin cell-transistor leads wide tWR (write recovery time) margins. Cylinder-like MIM cell capacitor with ZAZ dielectric is exploited on cell capacitor. Copper implemented triple-metal layer and WN barrier-metal techniques were developed to decrease chip size.

Reliability of MIM HAO capacitor for 70nm DRAM

In order to verify the package reliability of a MIM HAO capacitor module, mass production 256M DDR processes with 0.1 /spl mu/m design rule were adopted. The capacitor dielectrics used were HAH and Hf/sub x/Al/sub y/O/sub z/ and showed Tox.eq of 12/spl Aring/ and Lc of<0.2 fA/cell, respectively. With proper thermal compensation for adjusting the cell Vt, we could get a high probe test yield, and high package yield when a MIM HAO capacitor was introduced instead of an SIS Al/sub 2/O/sub 3/ capacitor. With package samples, the refresh time of the device did not degrade after IR and EFR stresses, and finally, we could confirm the reliability of MIM HAO capacitors at package level through long term operation lifetime testing.

Investigation on the compositionally graded Hf/sub x/Al/sub y/O/sub z/ films for TiN based DRAM capacitor

New concept of capacitor dielectric thin film was successfully demonstrated through graded Hf/sub x/Al/sub y/O/sub z/ dielectric thin film accompanied by post ozone annealing for the application to DRAM capacitor. MIM capacitor with graded Hf/sub x/Al/sub y/O/sub z/ dielectric films showed drastically reduced leakage current and highly improved breakdown voltage by 0.45-0.75V maintaining the same EOT value. In the case of graded film with Hf/Al=1.5/1, EOT showed very small value of 12.3/spl Aring/ and leakage current could be maintained as low as 1E/sup -16/A/cell at +1.0V.

Development of highly robust nano-mixed Hf/sub x/Al/sub y/O/sub z/ dielectrics for TiN/Hf/sub x/Al/sub y/O/sub z//TiN capacitor applicable to 65nm generation DRAMs

TIT capacitor with Nano-mixed Hf/sub x/Al/sub y/O/sub z/ dielectric was successfully demonstrated to be applicable to 65nm DRAM devices. Nano-mixed Hf/sub x/Al/sub y/O/sub z/ thin film by ALD(Atomic Layer Deposition) showed an excellent thermal stability even up to 700/spl deg/C without any leakage current degradation. Moreover, Nano-mixed films revealed lower leakage current than laminate due to effective nano-scale mixing of HfO/sub 2/ and Al/sub 2/O/sub 3/TiN/Hf/sub x/Al/sub y/O/sub z//TiN capacitor turned out to be applicable to 65nm DRAM showing low EOT of 11/spl Aring/ and low leakage of 1 fA/cell.