Hananeh Aliee

A new time-independent reliability importance measure

Modern digital systems pose new challenges to reliability analysts. Systems may exhibit a non-coherent behavior and time becomes an important element of the analysis due to aging effects. Measuring the importance of system components in a computationally efficient way becomes essential in system design. Herein, we propose a new importance measure for time-independent reliability analysis. The importance measure is based on the change in mean time to failure caused by the failure (success) of a component. It possesses some attractive properties: i) it is defined for both coherent and non-coherent systems; ii) it has an intuitive probabilistic and also geometric interpretation; iii) it is simple to evaluate. It turns out that the proposed importance measure leads naturally to a test of time consistency. We illustrate the properties with examples of coherent and non-coherent systems. A comparison with the ranking of other time-dependent and time-independent reliability importance measures is also offered. The realistic application to the reliability analysis of an H.264 video decoder concludes the work.

Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience

Abstract The Resilience Articulation Point (RAP) model aims at provisioning researchers and developers with a probabilistic fault abstraction and error propagation framework covering all hardware/software layers of a System on Chip. RAP assumes that physically induced faults at the technology or CMOS device layer will eventually manifest themselves as a single or multiple bit flip(s). When probabilistic error functions for specific fault origins are known at the bit or signal level, knowledge about the unit of design and its environment allow the transformation of the bit-related error functions into characteristic higher layer representations, such as error functions for data words, Finite State Machine (FSM) state, macro-interfaces or software variables. Thus, design concerns at higher abstraction layers can be investigated without the necessity to further consider the full details of lower levels of design. This paper introduces the ideas of RAP based on examples of radiation induced soft errors in SRAM cells, voltage variations and sequential CMOS logic. It shows by example how probabilistic bit flips are systematically abstracted and propagated towards higher abstraction levels up to the application software layer, and how RAP can be used to parameterize architecture-level resilience methods.

Automatic success tree-based reliability analysis for the consideration of transient and permanent faults

Success tree analysis is a well-known method to quantify the dependability features of many systems. This paper presents a system-level methodology to automatically generate a success tree from a given embedded system implementation and subsequently analyzes its reliability based on a state-of-the-art Monte Carlo simulation. This enables the efficient analysis of transient as well as permanent faults while considering methods such as task and resource redundancy to compensate these. As a case study, the proposed technique is compared with two analysis techniques, successfully applied at system level: (1) a BDD-based reliability analysis technique and (2) a SAT-assisted approach, both suffering from exponential complexity in either space or time. Experimental results performed on an extensive test suite show that: (a) Opposed to the Success Tree (ST) and SAT-assisted approaches, the BDD-based approach is highly vulnerable to exhaust available memory during its construction for moderate and large test cases. (b) The proposed ST technique is competitive to the SAT-assisted analysis in analysis speed and accuracy, while being the only technique that is suitable to also handle large and complex system implementations in which permanent and transient faults may occur concurrently.

On the Boolean extension of the Birnbaum importance to non-coherent systems

The Birnbaum importance measure plays a central role in reliability analysis. It has initially been introduced for coherent systems, where several of its properties hold and where its computation is straightforward. This work introduces a Boolean expression for the notion of criticality that allows the seamless extension of the Birnbaum importance to non-coherent systems. As a key feature, the novel definition makes the computation and encoding straightforward with well-established techniques such as Binary Decision Diagrams (BDDs) or Fault Trees (FTs). Several examples and a case study illustrate the findings.

Application-aware cross-layer reliability analysis and optimization

Abstract The increasing error susceptibility of semiconductor devices has put reliability in the focus of modern design methodologies. Low-level techniques alone cannot economically tackle this problem. Instead, counter measures on all system layers from device and circuit up to the application are required. As these counter measures are not for free, orchestrating them across different layers to achieve optimum trade-offs for the application wrt. reliability but also cost, timeliness, or energy consumption becomes a challenge. This typically requires a combination of analysis techniques to quantify the achieved reliability and optimization techniques that search for the best combination of counter measures. This work presents five recent approaches for application-aware cross-layer reliability optimization from within the embedded domain. Moreover, the Resilience Articulation Point (RAP) as a concept cooperatively developed to model errors across different layers is discussed. The developed approaches are showcased via applications, ranging from MIMO systems to distributed embedded control applications.

An efficient technique for computing importance measures in automatic design of dependable embedded systems

Importance measure analysis judges the relative importance of components in a system and reveals how each component contributes to the system reliability. In the design of large and complex systems, importance measure analysis can therefore be employed to guide an optimization tool which design decisions to investigate to gain higher reliability. While previous research has mainly concentrated on developing analytical importance measure techniques, the automatic and frequent computing of importance measures as required in the context of design space exploration has got very few, if any attention. This paper presents a highly efficient technique to compute the reliability and structural importance measures of components of a system. The proposed technique considers the reliability of a system implementation and subsequently analyzes the importance measures of its components based on a state-of-the-art Monte Carlo simulation. The technique can therefore estimate the importance measures of all components concurrently, highly improving the performance of the computation compared, e. g., to the well-known Birnbaum approach by the factor of 2n with n being the number of components. Moreover, we show how this algorithm can be extended to support importance measure analysis in the existence of transient faults which is essential since in future systems, transient faults are expected to cause relatively more failures than permanent faults. We integrated the proposed analysis approach in an existing multi-objective local-search algorithm that is part of an automatic system-level design space exploration which seeks for system implementations with highest reliability at lowest possible cost. Experimental results show that the proposed algorithm performs efficiently with negligible imprecision, even for large realworld examples.

System-level reliability analysis considering imperfect fault coverage

Safety-critical systems rely on redundancy schemes such as k-out-of-n structures which enable tolerance against multiple faults. These techniques are subject to Imperfect Fault Coverage (IFC) as error detection and recovery might be prone to errors or even impossible for certain fault models. As a result, these techniques may act as single points of failure in the system where uncovered faults might be overlooked and lead to wrong system outputs. Neglecting IFC in reliability analysis may lead to fatal overestimations in case of safety-critical applications. Yet, existing techniques that do consider IFC are overly pessimistic in assuming that the occurrence of an uncovered fault always results in a system failure. But often, in particular in complex systems with nested redundant structures, a fault that is not noticed by an inner redundancy scheme might be caught by an outer redundancy scheme. This paper proposes to automatically incorporate IFC into reliability models, i. e. Binary Decision Diagrams (BDDs), to enable an accurate reliability analysis for complex system structures including nested redundancies and repeated components. It also shows that IFC does not equally affect different redundancy schemes. Experimental results presented for applications in multimedia and automotive confirm that the proposed approach can analyze system reliability more accurately at an acceptable execution time and memory overhead compared to the underlying IFC-unaware technique.

Guiding Genetic Algorithms using importance measures for reliable design of embedded systems

Reliability importance measures (IMs) support analysts in understanding the contributions of components to the reliability of the system under investigation. This understanding can be of use to improve the reliability of a system and at the same time, restrict the cost penalty by upgrading only the highly important components to more reliable ones. This paper studies how IMs can enhance the design of embedded systems, more specifically to guide the optimization process. The observations are later employed to modify a well-known Genetic Algorithm (GA) to create new offsprings using the IMs of the components of their parents. The experimental results prove the efficiency of the proposed algorithm which not only seeks for more reliable designs, but also reckons with other design objectives-in this paper resource cost and power consumption-concurrently to ensure that they are not degraded through the optimization process.

Automatic graph-based success tree construction and analysis

This paper presents a graph-based representation of success trees to evaluate the reliability of an embedded system. First, a success tree is constructed by deriving a characteristic function from a graph-based system model automatically. The constructed success tree is then translated to a graph (called a success graph) which supports both cyclic and acyclic data dependencies in applications to be mapped to the system resources and analyzed for reliability. To analyze the success graph, an algorithm called 0-propagation is introduced which propagates errors through the graph. The system fails if the errors propagate to the output of the success graph. Experimental results show that the proposed technique can simply and efficiently construct and analyze success trees of real-life embedded systems in a short time with negligible inaccuracy which suits well for evaluating the reliability of complex systems, e. g., as part of a design space exploration.