Hanjung Song

Fast and Stable Ionic Electroactive Polymer Actuators with PEDOT:PSS/(Graphene–Ag-Nanowires) Nanocomposite Electrodes

Ionic electroactive polymer (IEAP) actuators that are driven by electrical stimuli have been widely investigated for use in practical applications. However, conventional electrodes in IEAP actuators have a serious drawback of poor durability under long-term actuation in open air, mainly because of leakage of the inner electrolyte and hydrated cations through surface cracks on the metallic electrodes. To overcome this problem, a top priority is developing new high-performance ionic polymer actuators with graphene electrodes that have superior mechanical, electrical conductivity, and electromechanical properties. However, the task is made difficultby issues such as the low electrical conductivity of graphene (G). The percolation network of silver nanowires (Ag-NWs) is believed to enhance the conductivity of graphene, while poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS), which exhibits excellent stability under ambient conditions, is expected to improve the actuation performance of IEAP actuators. In this study, we developed a very fast, stable, and durable IEAP actuator by employing electrodes made of a nanocomposite comprising PEDOT:PSS and graphene–Ag-NWs (P/(G–Ag)). The cost-effective P/(G–Ag) electrodes with high electrical conductivity displayed a smooth surface resulting from the PEDOT:PSS coating, which prevented oxidation of the surface upon exposure to air, and showedstrong bonding between the ionic polymer and the electrode surface. More interestingly, the proposed IEAP actuator based on the P/G–Ag electrode can be used in active biomedical devices, biomimetic robots, wearable electronics, and flexible soft electronics.

An Integrated Approach of CNT Front-end Amplifier towards Spikes Monitoring for Neuro-prosthetic Diagnosis

AbstractThe future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to 80 μV while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of 2 μW under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves 60 GΩ of input impedance and input referred noise of 8.5 nv/

Design of a 5V-output boost DC-DC converter with improved protection functions for battery-operated devices

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Analysis of the Lorenz Circuit using a 8-bit PIC Microcontroller

Hz over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

A 1.25 THz High Gain Hybrid Circuit with CNT Model Performance Optimization for Radar Sensors Application

This paper presents a dual-mode DC-DC buck converter with on-chip multiplier capacitor-based compensation scheme for portable applications. The proposed converter consists of a power stage and an monolithic CCM/CDM controller that operates with a high clock frequency of 1 MHz. A dual modulation technique is utilized to improve the power conversion efficiency over a wide range of load conditions. In order to reduce chip area the controller, external capacitors are replaced with the on-chip multiplier capacitor-based compensation scheme. Additionally, protection blocks such as over voltage protection (OVP), under voltage lock-out (UVLO) and thermal shutdown (TSD) block are also integrated on the chip. The proposed buck converter was designed and implemented using a 0.18 um CMOS process. The measured results of the fabricated circuit showed a peak efficiency of 94.8%, a ripple voltage of 13.29 mV ripple and an 1.8 V output voltage with a supply voltage ranging from 2.7 to 3.3 V.

Voltage regulation of retina neuron model with dynamic feedback for biological acquisition image

In this paper, a step-up dc-dc converter for mobile device applications is proposed. The converter is operated with 1 MHz high switching frequency. The power stage of converter includes an inductor, an output capacitor, MOS transistors and feedback resistors for control loop. The control stage consists of an error amplifier, comparator, a ramp generator for PWM block, bandgap reference and soft start block with power transistor. Also, the circuit includes protection block such as over voltage protection (OVP), under voltage lock out (UVLO) and thermal shutdown (TSD) block. The proposed step-up converter has been designed with a 0.18 um CMOS process technology. Simulation results show an output voltage of 5 V with a ripple of 40 mV at the output current of 100 mA for an input voltage of 3.3 V.

PSPICE Analysis of CNFET Based Logic Circuits for Low Voltage Applications

요 약 본 논문은 소형 가전기기를 위한 AC DC 파워모듈 설계를 제시하고 효율과 신뢰성 및 안정성 특성을 나타낸다. 제안하는 파워모듈은 PCB 테스트보드에서 PWM 제어 IC 칩, 파워모스 소자, 트랜스포머, 각종 수동소자 (저항, 커패시터, 인덕터)를 사용하여 제작하였다. 본 논문에서 제시한 AC DC 파워모듈 회로 시뮬레이션 결과를 토대로 측정한 실험에서 입력 전압은 상용전원 전압 220 V (RMS), 주파수 60 HZ의 교류전압(VAC : Voltage alternating current)을 사용 하였으며, 출력전 압, OCP (over current protection), EMI(electromagnetic interference), PWM 신호 펄스, 효율 측정, 패키징 여부에 따른 발열 측정 등을 실시하였다. 또한 파워모듈의 온도에 따른 특성변화와 트랜스포머 기준으로 1차측의 회로와 2차측 회로의 절연상 태 확인을 하기 위한 내전압 테스트 등의 신뢰성테스트를 실시하였다. 효율 및 신뢰성 측정결과, AC DC 파워 모듈이 5 V의 출력전압, 200 mV의 리플, 약 73 %의 효율, 온도 약 80°C 까지 안정적으로 동작함을 확인하였으며, 4.2 kV의 크기로 60초 동안 견디는 내압 성능을 보였다.

Design of a step-up DC-DC Converter using a 0.18 um CMOS Process

본 논문에서는 암호통신 응용을 위한 로렌츠 카오스 회로를 8 비트 PIC 마이크로 콘트롤러를 사용하여 설계 및 분석을 하였다. 카오스 신호를 생성하는 대표적인 시스템인 로렌츠 시스템은 3개의 1차 미분 방정식으로 표현되며, 3개의 상태변수를 가진다. 일반적으로 로렌츠 시스템은 곱셈기와 연산증폭기, 저항 및 커패시터 등 여러 개의 수동소자로 이루어지는 아날로그 회로로 구현된다. 본 논문에서 제안하는 회로는, 연산증폭기 기반 아날로그 회로와는 다르게, 8 비트 PIC 마이크로 콘트롤러 칩과 3개 디지털-아날로그 변환기로 이루어진다. 제안하는 마이크로 컨트롤러 기반의 로렌츠시스템의 경우, 3개의 미분방정식은 3개의 차분방정식으로 변환된다. 프로테우스 프로그램을 이용하여 제안하는 회로에 대한 모의실험을 실시하였다. 제안하는 마이크로 콘트롤러 기반 로렌츠 회로에 대하여, 프로테우스 프로그램에 의한 모의실험을 통하여 시간파형, 주파수 특성, 2차원 위상특성 및 3차원 위상특성 해석을 실시하였다. 매개변수 r 의 조건에 따라, 로렌츠 회로의 특성 제어가 가능하며, 최적화 된 r 의 값에서, 카오스 신호가 정상적으로 생성됨을 확인하였다.