Harald Jacobsson
Ericsson
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Featured researches published by Harald Jacobsson.
IEEE Journal of Solid-state Circuits | 2006
Mingquan Bao; Harald Jacobsson; Lars Aspemyr; Geert Carchon; X. Sun
A subharmonic down-conversion passive mixer is designed and fabricated in a 90-nm CMOS technology. It utilizes a single active device and operates in the LO source-pumped mode, i.e., the LO signal is applied to the source and the RF signal to the gate. When driven by an LO signal whose frequency is only half of the fundamental mixer, the mixer exhibits a conversion loss as low as 8-11 dB over a wide RF frequency range of 9-31GHz. This performance is superior to the mixer operating in the gate-pumped mode where the mixer shows a conversion loss of 12-15dB over an RF frequency range of 6.5-20 GHz. Moreover, this mixer can also operate with an LO signal whose frequency is only 1/3 of the fundamental one, and achieves a conversion loss of 12-15dB within an RF frequency range of 12-33 GHz. The IF signal is always extracted from the drain via a low-pass filter which supports an IF frequency range from DC to 2 GHz. These results, for the first time, demonstrate the feasibility of implementation of high-frequency wideband subharmonic passive mixers in a low-cost CMOS technology
IEEE Journal of Solid-state Circuits | 2004
Mingquan Bao; Yinggang Li; Harald Jacobsson
A balanced Colpitts voltage-controlled oscillator (VCO) is designed and fabricated in a commercially available 0.25-/spl mu/m SiGe BiCMOS process. It has the characteristics of the push-push VCO, i.e., the VCO has simultaneously a differential output at a fundamental frequency of 21.5 GHz and a single-ended output at the second harmonic frequency of 43 GHz. A differential tuning technique is applied to reduce the phase noise. The measured phase noise at 1-MHz offset is -113 dBc/Hz at 21.5 GHz and -107 dBc/Hz at 43 GHz. The corresponding output power is about -6 and -17 dBm, respectively, with a 5% tuning range and a 130-mW dc power consumption.
international microwave symposium | 2002
Harald Jacobsson; Bertil Hansson; Hiikan Berg; Spartak Gevorgian
With the aim of achieving very low phase noise, two area and power consumption efficient methods of coupling two or more identical VCOs are presented. To verify the principles, a set of fully integrated, coupled VCOs of the cross-coupled differential pair type, was manufactured in a commercial SiGe HBT technology. The measured phase noise at 100 kHz offset frequency was -106 dBc/Hz at 6 GHz using two coupled VCOs and -103 dBc/Hz at 12 GHz using four coupled VCOs. A phase noise reduction of 1-6 dB was achieved relative to a single VCO of the same topology. In one of the two methods, output signals are additionally obtained in quadrature.
topical meeting on silicon monolithic integrated circuits in rf systems | 2006
Lars Aspemyr; Harald Jacobsson; Mingquan Bao; Henrik Sjöland; Mattias Ferndahl; Geert Carchon
The design and measured performance of two low-noise amplifiers at 15 GHz and 20 GHz realized in a 90 nm RF-CMOS process are presented in this work. The 15 GHz LNA achieves a power gain of 12.9 dB, a noise figure of 2.0 dB and an input referred third-order intercept point (IIP3) of -2.3 dBm. The 20 GHz LNA has a power gain of 8.6 dB, a noise figure of 3.0 dB and an IIP3 of 5.6 dBm. Compared to previously reported designs, these two LNAs show lower noise figure at lower power consumption
IEEE Transactions on Microwave Theory and Techniques | 2000
Harald Jacobsson; Spartak Gevorgian; M. Mokhtari; C. Hedenas; B. Hansson; T. Lewin; H. Berg; W. Rabe; A. Schuppen
A set of fully integrated voltage-controlled oscillators (VCOs) in the 5-8 GHz frequency range has been designed and manufactured in Si bipolar and Si-SiGe-heterojunction-bipolar-transistor technology. A minimum phase noise of -100 dBc/Hz at 100-kHz off carrier was measured for 2-V supply voltage and 16 mW of power consumption. SiGe VCOs give considerably better phase-noise performance than Si bipolar VCOs for the technologies investigated herein, using similar topologies.
international microwave symposium | 2000
Harald Jacobsson; Spartak Gevorgian; M. Mokhtari; Bertil Hansson; C. Hedenas; Thomas Lewin; W. Rabe; A. Schuppen
A set of fully integrated VCOs in the 5-8 GHz frequency range has been designed and manufactured in Si/SiGe-HBT technology. A minimum phase noise of -100 dBc/Hz at 100 kHz off-carrier was measured for 2 V supply voltage and 6 mW power consumption.
international microwave symposium | 2006
Harald Jacobsson; Mingquan Bao; Lars Aspemyr; Abdelkarim Mercha; Geert Carchon
Two low phase noise, sub-1 V supply VCO topologies have been explored at 12 and 18 GHz in a 90 nm CMOS technology for direct LO generation in microwave link applications. At 12 GHz, a cross-coupled differential NMOS pair VCO achieves a phase noise of -117 dBc/Hz at 1 MHz offset while consuming only 1.6 mW from a 0.47 V supply. At 18 GHz a Hartley VCO with a novel tuning scheme reached -119 dBc/Hz at 1 MHz offset, consuming 4.2 mW from a 0.8 V supply. The well established VCO FOM is 196 and 199 for the 12 and 18 GHz VCOs, respectively
IEEE Transactions on Microwave Theory and Techniques | 2007
Martin Norling; Andrei Vorobiev; Harald Jacobsson; Spartak Gevorgian
This paper reports a K-band voltage-controlled oscillator based on room-temperature ferroelectric varactors. The circuit is realized as a hybrid module where flip-chip transistors are mounted on a silicon substrate with integrated ferroelectric varactors and passive circuitry. The size of the module is 4.7times2.2 mm2. The measured center frequency is 16.5 GHz with a linear tunability of 6.7% and an output power of 3 dBmplusmn1 dB over the tuning range. The measured phase noise at center frequency is -95 dBc/Hz at 100-kHz offset. Another version of the oscillator is measured operating at 19.6 GHz with a tunability of 3.3% and a phase noise of -102 dBc/Hz at 100-kHz offset
asia-pacific microwave conference | 2006
Lars Aspemyr; Henrik Sjöland; Harald Jacobsson; Mingquan Bao; Geert Carchon
This work presents a fully integrated differential 5.8 GHz low-noise amplifier (LNA). The LNA is fabricated in a 90 nm RF-CMOS process and has a power gain of 12.5 dB, an IIP3 of 4dBm, and a noise figure of 1.7 dB consuming 14 mA from a 1.2 V supply. Compared to previously reported differential CMOS designs this LNA show lower noise figure and better linearity.
european solid-state circuits conference | 2006
Harald Jacobsson; Lars Aspemyr; Mingquan Bao; Abdelkarim Mercha; Geert Carchon
A very wide-band amplifier has been designed in a 90 nm CMOS process, utilizing a common source topology with shunt resistor-inductor feedback. Both input and output return loss was better than 10 dB from 6 to 23 GHz for a one-stage amplifier and from 5 to 26 GHz for a two-stage version. The gain varied from 6 to 9 dB for the one-stage amplifier and from 12 to 16 dB for the two-stage amplifier over that frequency range. The noise figure is below 7 dB over 5-26 GHz for both amplifiers. At 20 GHz the input IP3 of the one- and two-stage amplifiers were 14 dBm and 6 dBm, respectively