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Publication
Featured researches published by Harish N. Kotecha.
IEEE Electron Device Letters | 1982
F.H. De La Moneda; Harish N. Kotecha; M. Shatzkes
A method is described to electrically determine MOSFET channel length, mobility, gate-bias dependence and parasitic series resistance. These four quantities are obtained by curve fitting output resistance measurements over a range of gate biases and channel lengths. Measurements from two gate biases on each of two devices of different channel lengths are sufficient to obtain a full characterization. Thus, the method is well suited for automated testing because of its simplicity and efficiency.
international solid-state circuits conference | 1981
Harish N. Kotecha; Chung Lam
An experimental floating-gate FET with two capacitively-coupled control gates for nonvolatile and electrically alterable application will be discussed. An enhanced conduction insulator under one control gate serves to charge/discharge the floating gate.
Archive | 1980
Harish N. Kotecha; Wendell P. Noble; Francis W. Wiedman
Archive | 1979
Kenneth E. Beilstein; Harish N. Kotecha
Archive | 1977
Francisco H. De La Moneda; Harish N. Kotecha
Archive | 1991
Harish N. Kotecha; Hans Adolf Protschka; Dave Stanasolovich; Jacob F. Theisen
Archive | 1979
Harish N. Kotecha; Francisco H. DeLaMoneda
Archive | 1978
Kenneth E. Beilstein; Harish N. Kotecha
Archive | 1982
Al M. Bracco; Arthur Edenfeld; Harish N. Kotecha
Archive | 1983
Edward C. Fredericks; Harish N. Kotecha
