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Featured researches published by Haruyoshi Suehiro.


IEEE Transactions on Electron Devices | 1994

Highly doped InGaP/InGaAs/GaAs pseudomorphic HEMT's with 0.35 /spl mu/m gates

Haruyoshi Suehiro; Tadayuki Miyata; Shigeru Kuroda; Naoki Hara; Masahiko Takikawa

We fabricated 0.35-/spl mu/m gate-length pseudomorphic HEMT DCFL circuits using a highly doped thin InGaP layer as the electron supply layer. The InGaP/InGaAs/GaAs pseudomorphic HEMT grown by MOVPE is suitable for short gate-length devices with a low supply voltage since it does not show short channel effects even for gate length down to 0.35 /spl mu/m. We obtained a K value of 555 mS/Vmm and a transconductance g/sub m/ of 380 mS/mm for an InGaP layer 18.5 nm thick. Fabricated 51-stage ring oscillators show the basic propagation delay of 11 ps and the power-delay product of 7.3 fJ at supply voltage of V/sub DD/ of 1 V, and 13.8 ps and 3.2 fJ at V/sub DD/ of 0.6 V for gates 10 /spl mu/m wide. >


IEEE Electron Device Letters | 1997

0.3-μm gate length p-channel AlGaAs/InGaAs heterostructure field effect transistors with high cut-off frequency

Naoki Hara; Haruyoshi Suehiro; Masashi Shima; Shigeru Kuroda

P-channel Heterostructure Field Effect Transistors (HFETs) with a 0.3-/spl mu/m gate were fabricated by Mg ion implantation. The maximum transconductance was 68 mS/mm and there was no serious drain or gate leakage current, regardless of this short gate length. The gate turn on voltage (@I/sub gs/=-1 /spl mu/A//spl mu/m) was -2.1 V and its absolute value was large enough for use in complementary HFETs. S-parameters measurements showed a very high cut-off frequency of over 10 GHz. Results indicated the superiority of less-diffusive Mg ion implantation for forming p/sup +/-layer in p-channel HFETs.


Solid-state Electronics | 1997

0.065 μm gate InGaP/InGaAs/GaAs pseudomorphic HEMTs with highly-doped 11.5 nm thick InGaP electron supply layers

Mizuhisa Nihei; Naoki Hara; Haruyoshi Suehiro; Shigeru Kuroda

Abstract We demonstrated that the thinning of InGaP electron supply layers is very effective in reducing short channel effects, even for 0.065 μm gate InGaP/InGaAs/GaAs pseudomorphic HEMTs. By thinning the InGaP electron supply layer to 11.5 nm with a high doped density of 5 × 10 18 cm −3 , we were able to minimize the threshold voltage shift to less than 0.15 V compared to 1.65 μm gate length HEMTs. We could also increase the extrinsic transconductance ( g m ) by thinning the InGaP electron supply layer. We observed no degradation of gate leakage characteristics, regardless of such a highly-doped, thin InGaP layer. The 0.065 μm gate length HEMT exhibits an extrinsic transconductance ( g m ) of 585 mS mm −1 , a current gain cutoff frequency ( f τ ) of 110 GHz and a maximum oscillation frequency ( f max ) of 150 GHz.


ieee gallium arsenide integrated circuit symposium | 1996

Subfemtojoule 0.15 /spl mu/m InGaP/InGaAs/GaAs pseudomorphic HEMT DCFL circuits under 1 V supply voltage

Haruyoshi Suehiro; Masashi Shima; Toshihiro Shimura; Naoki Hara

We have fabricated side-wall assisted 0.15 /spl mu/m T-shaped gate pseudomorphic HEMT DCFL circuits with InGaP donor layers and obtained 22.3 ps basic delay and 0.8 fJ power-delay products at a supply voltage Vdd of 0.6 V with the driver gate width of 2 /spl mu/m. A master-slave type divide-by-two frequency divider which consists of eight 2-input NAND gates using a dual gate electrode structure shows stable operation of 10 GHz toggle frequency with a power consumption of 4.5 mW at Vdd of 0.8 V.


Solid-state Electronics | 1995

A 48.1 ps HEMT DCFL NAND circuit with a dual gate structure

Haruyoshi Suehiro; Tadayuki Miyata; Naoki Hara; Shigeru Kuroda

We fabricated HEMT DCFL 2-input NAND circuits and examined their feasibility using a dual gate structure. Our HEMT had MOVPE-grown InGaP/InGaAs/GaAs pseudomorphic HEMT structures. We first investigated characteristics of the dual gate HEMT in the short gate length region and showed that HEMTs can reveal their inherent properties even in the DCFL NAND circuits. We fabricated a 2-input NAND ring oscillator with a gate length of 0.5 μm. It successfully operated and showed a propagation delay of 48.1 ps and a power consumption of 0.235 mW per stage at a supply voltage of 0.8 V. A master-slave type divide-by-two frequency divider which consists of eight 2-input NAND gates also showed 3.14 GHz operation with a power consumption of 2 mW.


Journal of Applied Physics | 1997

ENHANCEMENT OF MG ACTIVATION IN ALGAAS BY MG+AR AND MG+P DUAL ION IMPLANTATION

Naoki Hara; Haruyoshi Suehiro; Shigeru Kuroda; Masahiko Takikawa

We have investigated Mg+Ar and Mg+P dual ion implantation into AlxGa1−xAs with a wide range of the Al fraction (0⩽x⩽0.75). We characterized the electrical properties and radiation damage of implanted AlxGa1−xAs layers to clarify the effects of dual implantation. Mg+P dual implantation, which maintained a stoichiometric balance, improved the electrical properties in AlxGa1−xAs for all Al fractions investigated. On the other hand, Mg+Ar dual implantation, which introduces additional radiation damage and increases the number of group III vacancies to enhance the Mg activation, improved the electrical properties in AlxGa1−xAs with a high Al fraction but degraded them in AlxGa1−xAs with a low Al fraction. The difference between Mg+P and Mg+Ar dual implantation is due to the different mechanism of Mg activation enhancement. The effect of keeping the stoichiometric balance is valid regardless of the Al fraction, and increasing radiation damage hardly affects the activation. In AlxGa1−xAs with a high Al fraction,...


Japanese Journal of Applied Physics | 1995

Effect of Adding CO2 to CH4/H2 Mixture for InGaAs/GaAs Selective Reactive Ion Etching

Mizuhisa Nihei; Naoki Hara; Haruyoshi Suehiro; Shigeru Kuroda

InGaAs/GaAs selective reactive ion etching (RIE) by adding CO 2 to a conventional CH 4 /H 2 mixture was developed for the first time. We demonstrated that adding CO 2 (7.8%) ) not only reduced polymer deposition during etching, but also achieved a significant increase in the In 0.52 Ga 0.48 As/GaAs selectivity from 2 to a maximum value of 6.5. We analized the etched surface with X-ray photoelectron spectroscopy (XPS) and found that the surface is polymer-rich after the CH 4 /H 2 RIE, but it changes to Ga 2 O 3 -rich after our CH 4 /H 2 /CO 2 (7.8%) RIE. From this result, we proposed a mechanism of the InGaAs/GaAs selective RIE.


Japanese Journal of Applied Physics | 1994

Warp Reduction of High-Electron-Mobility-Transistor on Si Wafer by In-Doped Selectively Doped Heterostructure and Strained-Layer Superlattice Buffer Layer

Tatsuya Ohori; Haruyoshi Suehiro; Kazumi Kasai; Junji Komeno

Structure to reduce warp of high electron mobility transistors (HEMT) on Si wafers is investigated. The proposed structure consists of an In-doped selectively doped heterostructure and a strained layer superlattice buffer layer. Upon reducing the stress and the total epitaxial layer thickness, the warp of our proposed HEMT structure grown on a 3-inch-diameter Si wafer was reduced to about 1/3 of that of the conventional structures. Using the Fox-Jesser strain relaxation theory, we analyzed the stress reduction mechanism. We found that the frictional force acting on dislocations is important for stress reduction of In-related compounds. We fabricated HEMT ring oscillator circuits with gate length of 0.4 µm. The circuits had a delay time of 19.1 ps/gate and power consumption of 0.175 mW/gate. These values are comparable with those on GaAs substrates.


Applied Surface Science | 1997

Interface property of Mg-based dual ion implanted p+-ohmic layers in p-channel pseudomorphic AlGaAs/InGaAs heterostructure FETs

Naoki Hara; Haruyoshi Suehiro; Shigeru Kuroda

Abstract We evaluated pseudomorphic Al 0.75 Ga 0.25 As/In 0.2 Ga 0.8 As/GaAs p-channel heterostructure field effect transistors (pch-HFETs) fabricated by Mg, Mg + P, and Mg + Ar ion implantation, and examined the implanted heterostructures to study the effect of interface characteristics on device properties. It was found that P dual implantation improves device performance by reducing sheet resistance (ρ s ) and contact resistance ( R c ), while Ar dual implantation increases ρ s and R c and, as a result, degrades device performance. Dual implantation has double-edged influence on heterostructures. Interfaces having gradually varying atomic profiles produced by ion implantation usually have low contact resistance because of their lower barrier height. The accompanying radiation damage, however, induces the defects around interfaces that trap carriers. For Mg-based dual ion implanted pch-HFETs, the most gradual interface does not result in the highest device performance, as observed in the Mg + Ar implanted heterostructure that has the most gradual atomic profiles at interfaces, among Mg, Mg + P, and Mg + Ar implanted samples. We showed by the results of electrochemical capacitance-voltage measurement that the carrier density in the Mg + P implanted heterostructure is higher in all layers compared to the Mg implanted sample. This is the reason for the highest performance exhibited by Mg + P implanted pch-HFETs. On the other hand, the Mg + Ar implanted heterostructure has the lowest carrier density in InGaAs layer due to the severe radiation damage induced during Ar dual implantation, which remains even after activation annealing. The different effects of P dual implantation and Ar dual implantation stem from the different mechanisms for Mg activation involved in the processes. We conclude that dual implantation resulting in insignificant radiation damage can be applied to fabricate highly doped ohmic regions in HFETs.


international electron devices meeting | 1994

A 3.6 GHz dual modulus prescaler IC using optimal pseudomorphic HEMT structure on Si substrates

Haruyoshi Suehiro; Tatsuya Ohori; Yasuhiro Nakasha; Tadayuki Miyata; Y. Watanabe; Shigeru Kuroda; Masahiko Takikawa

A dual modulus divide-by-128 or 129 prescaler IC was fabricated using 0.35 /spl mu/m gate-length HEMT DCFL technology on a Si substrate. We optimized the HEMT epitaxial structure so that it consisted of a Si-doped InAlGaAs-AlGaAs (5/5 nm) strained layer superlattice (SLS), an InGaAs pseudomorphic channel layer, an SLS buffer layer and a GaAs buffer layer grown by MOVPE. Our prescaler IC on a Si substrate gives 3.6 GHz/9.8 mW at a supply voltage of 1.5 V.<<ETX>>

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