Mizuhisa Nihei

Electrical Properties of Carbon Nanotube Bundles for Future Via Interconnects

We have developed carbon nanotube (CNT) vias consisting of about 1000 tubes using thermal chemical vapor deposition (CVD) at a growth temperature of 450°C with cobalt catalysts, titanium carbide ohmic contacts, and tantalum barrier layers on copper wiring. The lowest resistance obtained was about 5 Ω/via. The total resistance of the CNT via was three orders of magnitude lower than that of one CNT, indicating that the current flows in parallel through about 1000 tubes. No degradation was observed for 100 hours at via current densities of 2×106 A/cm2, which is favorably compared with Cu vias.

Simultaneous Formation of Multiwall Carbon Nanotubes and their End-Bonded Ohmic Contacts to Ti Electrodes for Future ULSI Interconnects

We have succeeded in growing multiwall carbon nanotubes (MWNTs) with low-resistance ohmic contacts to titanium electrodes by hot-filament chemical vapor deposition (HF-CVD) using a nickel catalyst layer on a titanium electrode. The contact resistance of the sample with nickel/titanium electrodes was two orders of magnitude smaller than that of the sample with nickel catalyst electrodes without titanium. We assumed that the low-resistance ohmic contact was achieved by forming titanium carbide (TiC) during the growth at the MWNT/titanium electrode interface. Moreover, we have demonstrated the growth of vertically aligned bundles of MWNTs, which were end-bonded to the lower titanium electrodes, selectively in via holes. We believe this is the first report of such simultaneous formation of MWNTs and their end-bonded low-resistance ohmic contacts, and its first trial application to carbon nanotube (CNT) vias for future ULSI interconnects.

Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing

Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390°C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400°C was 0.6Ω for 2μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400°C in the Si LSI process.

Low-Temperature Synthesis of Graphene and Fabrication of Top-Gated Field Effect Transistors without Using Transfer Processes

Thickness-controlled growth of few-layer and multi-layer graphene was performed at 650 °C by thermal chemical vapor deposition, and top-gated field effect transistors (FETs) were fabricated directly on a large SiO2/Si substrate without graphene-transfer processes. Graphene was synthesized on patterned Fe films. The iron was subsequently etched after both ends of the graphene were fixed by source and drain electrodes, leaving the graphene channels bridging the electrodes all over the substrate. Top-gated FETs were then made after covering the channels with HfO2. The fabricated devices exhibit ambipolar behavior and can sustain a high-density current. The growth mechanism of graphene was also investigated.

Carbon Nanotubes for VLSI: Interconnect and Transistor Applications

We report the present status of Carbon Nanotube (CNT) CVD material technologies and their applications for via interconnects and FETs for VLSI. We succeeded in growing multi-walled CNTs (MWNTs) with the highest shell density (as high as 1013/cm2) and in fabricating via interconnects with high robustness against a high current density. We also report a Si-process compatible technique to control carrier polarity of Single-walled CNT (SWNT) FETs by utilizing fixed charges introduced by the gate oxide. High-performance p- and n-type CNT-FETs and CMOS inverters with stability in air have been realized.

Novel approach to fabricating carbon nanotube via interconnects using size-controlled catalyst nanoparticles

We propose a new approach to fabricating carbon nanotube (CNT) vias, which uses preformed catalyst nanoparticles to grow CNTs. A newly-designed impactor provided size-classified catalyst particles, and a new deposition system injected them into via holes down to 40 nm in diameter. The resultant CNT-via resistance was 0.59 Omega for 2-mum vias, which is the lowest ever reported, improved from the previous studies using catalyst films. The improvement resulted from higher-density CNTs grown in the via holes by employing the nanoparticle catalyst

Electrical Properties of Carbon Nanotubes Grown at a Low Temperature for Use as Interconnects

We measured the electrical properties of vertically aligned carbon nanotubes (CNTs) synthesized from via holes by radical chemical vapor deposition at a low temperature of 390 °C, which meets the requirements of the Si large scale integration (LSI) process. To use the CNTs could be used for LSI wiring, we applied chemical mechanical polishing (CMP) to the CNTs and successfully reduced the via resistance by a factor of ten. In addition, the resistance of the CNTs was reduced further to 0.6 Ω for 2-µm-diameter vias by annealing at 400 °C. Although the temperature dependence of the resistance of the CNTs grown in vias (CNT-vias) did not indicate ballistic transport, which is one of the expected properties of CNTs, we found that CMP and annealing are effective for reducing the via resistance of CNTs.

Synthesis of a Closely Packed Carbon Nanotube Forest by a Multi-Step Growth Method Using Plasma-Based Chemical Vapor Deposition

We report a synthesis of a closely packed multi-walled carbon nanotube (MWCNT) forest by a multi-step growth method, including a new approach to immobilize catalytic nanoparticles, using plasma-based chemical vapor deposition. The CNT packing density reaches one-half of the theoretical value, where the space of 30–40% is filled with MWCNTs. This value is approximately one order of magnitude larger than that of as-grown CNT forest synthesized using conventional methods. The method is applicable even at a spatially restricted region, for example, in trench or via hole, and is available at the growth temperature as low as 450 °C.

Carbon nanotube vias for future LSI interconnects

We have developed carbon nanotube (CNT) vias consisting of about 1000 tubes. The total resistance of the CNT via was measured as three orders of magnitude lower than the current flows in parallel through about 1000 tubes. There is no degradation observed for 100 hours at the via current density of 2/spl times/10/sup 6/ A/cm/sup 2/, which is favourably with Cu vias. This is the first trial demonstration of CNT vias for future LSI interconnects.

Direct Diameter-Controlled Growth of Multiwall Carbon Nanotubes on Nickel-Silicide Layer

By using plasma-enhanced chemical vapor deposition (p-CVD), we grew vertically aligned multiwall carbon nanotubes (CNTs) directly on a nickel-silicide layer, which can be used as electrodes for metal-oxide-semiconductor field-effect transistors (MOSFETs). By using a nickel-silicide layer as a catalyst, the nanotube diameter became smaller than that possible with a nickel film catalyst. We suggest that Ni-silicide composition plays an important role in controlling the diameter of the nanotubes. To our knowledge, this is the first report on diameter-controlled vertically aligned CNT growth on catalytic metal-silicide substrates.