Hau-Yan Lu

Enhancement of Brightness Uniformity by a New Voltage-Modulated Pixel Design for AMOLED Displays

This letter presents a new pixel design and driving method for active-matrix organic light-emitting diode (AMOLED) displays using low-temperature polycrystalline silicon thin-film transistors (TFTs). The proposed pixel circuit consists of five TFTs and one capacitor to eliminate the variation in the threshold voltage of the TFTs, and the drop in the supply voltage in a single frame operation by the source-follower-type connection and the bootstrap. The proposed pixel circuit has been verified to realize uniform output current by the simulation work using the HSPICE software. The novel pixel design has great potential for use in large-size and high-resolution AMOLED displays

High-performance hydrogenated amorphous-Si TFT for AMLCD and AMOLED applications

A novel technology for manufacturing high-performance hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) is developed in this letter. In the bottom gate light-shield a-Si:H TFT structure, the side edge of a-Si:H island is capped with extra deposition of heavily phosphorous-doped a-Si layer. Such an ingenuity can effectively eliminate the leakage path between the parasitic contacts of source/drain metal and the sidewall of a-Si:H island edge. In addition, electrical performance of the novel a-Si:H TFT device exhibits superior effective carrier mobility as high as 1.05 cm/sup 2//Vs, due to the enormous improvement in parasitic resistance. The impressively high performance of the proposed a-Si:H TFT provides the potential to apply foractive matrix liquid crystal display and active matrix organic light-emitting diode technology.

A New Pixel Circuit Compensating for Brightness Variation in Large Size and High Resolution AMOLED Displays

A new pixel design and driving method for active-matrix organic light-emitting diode (AMOLED) display using low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) is proposed. The new circuit consists of five TFTs and one capacitor to eliminate the variation in the threshold voltage of the TFTs, and the drop in the supply voltage in a single frame operation. The proposed pixel circuit has been verified to realize uniform output current by the simulation work using HSPICE software. The simulated error rate of the output current is also discussed in this paper. The novel pixel design has great potential for use in large size and high resolution AMOLED displays.

Electrical Degradation of N-Channel Poly-Si TFT under AC Stress

Electrical Degradation of N-Channel Poly-Si TFT under AC Stress C. W. Chen, T. C. Chang,* P. T. Liu, H. Y. Lu, T. M. Tsai, C. F. Weng, C. W. Hu, and T. Y. Tseng Institute of Electronics, Department of Physics and Institute of Electro-Optical Engineering, Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung, Taiwan Department of Photonics and Display Institute, and Institute of Electro-Optical Engineering, National Chiao Tung University, Hsin-Chu, Taiwan National Nano Device Laboratory, Science-based Industry Park, Hsin-Chu, Taiwan

Layout Dependence on Threshold Voltage Instability of Hydrogenated Amorphous Silicon Thin Film Transistors

In this paper, we discuss the threshold voltage instability of two distinct layouts of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs). By simultaneously applying gate and drain bias stress, we show that the average threshold voltage shift of circular a-Si:H TFTs is 54% less than that of conventional inverted staggered a-Si:H TFTs. This result is primarily due to that the circular layout reduces the channel electron concentration. ISE-DESSIS (Integrated System Engineering DEvice Simulation for Smart Integrated Systems) was used to simulate the parallel electric field and obtain the total channel electron concentration. The simulation results closely correspond to the explanation in this study. These results indicate a significant impact of improving threshold voltage stability by a layout method.

Elimination of Photoleakage Current in Poly-Si TFTs Using a Metal-Shielding Structure

A technology to eliminate the photoleakage current of poly-Si thin-film transistors (TFTs ) with top gate structure has been developed. A thin metal film is formed on the glass substrate to be used as a light-shielding layer. The light-shielding layer, buffer layer, and active island are patterned employing the same mask. The leakage current and the variation of subthreshold swing in the proposed devices are suppressed completely under illumination. Due to the parasitic capacitance in the overlap region between the drain side and the metal-shielding layer, a floating voltage coupled from drain bias influences the threshold voltage of the proposed poly-Si TFTs.

Reduction of photoleakage current in polycrystalline silicon thin-film transistor using NH3 plasma treatment on buffer layer

The technology of polycrystalline silicon thin-film transistors (poly-Si TFTs) with low photoleakage current is developed in this work. The electrical characteristics of poly-Si TFTs under illumination were significantly improved employing the NH3 plasma treatment on the buffer layer, with no need for complicate device structure and additional masks. The trap states that originated from the plasma bombardment on the interface between the poly-Si layer and buffer oxide can effectively recombine the light-induced electron-hole pairs. The fewer residual electron-hole pairs lead to the lower photoleakage current and improved subthreshold swing, as well as maintaining good electrical characteristics in the dark sate.

Degradation of Laser-Crystallized Laterally Grown Poly-Si TFT under Dynamic Stress

This letter studies the electrical degradation of laterally grown polycrystalline silicon thin-film transistors (poly-Si TFTs) under dynamic voltage stress. The experimental results show the serious electrical degradation of poly-Si TFTs with a protruding grain boundary. The concentration of the electric field in the protrusion region was verified by capacitance-voltage measurements and simulation of the device characteristics. These results reveal that more electrons are induced at the grain boundary of the poly-Si channel because of the relatively high electric field in the protrusion region. Based on these data, this letter proposes a model to explain the enhanced electrical degradation of poly-Si TFTs with a protruding grain boundary, generated by laser-crystallized lateral growth technique

13.3: A Novel a‐Si TFT Pixel Circuit with High Immunity to the Degradation of the TFTs and OLEDs Used in AMOLED Displays

A simple pixel circuit employing a-Si TFT for AMOLED is proposed. The proposed one can eliminate both the threshold voltage shift of the driving TFT and the OLED. The simulation results indicate that the proposed circuit significantly improves the non-uniformity of output current by the new compensation operation.

P‐15: Highly Reliable Amorphous Si TFT with Low Leakage for AMLCD and AMOLED Applications

A novel technology for manufacturing high-performance hydrogenated amorphous silicon (a-Si:H) TFT is developed in this work. In the bottom gate light-shied a-Si:H TFT structure, the side edge of a-Si:H island is capped with extra deposition of heavily phosphorous-doped a-Si layer. Such an ingenuity can effectively eliminate the leakage path between the parasitic contacts between source/drain metal and a-Si:H at the edge of a-Si:H island. In addition, electrical performance of the novel a-Si:H TFT device exhibits superior effective carrier mobility, as high as 1.05 cm2/Vsec due to the enormous improvement in parasitic resistance. The impressively high performance provides the potential of our proposed a-Si:H TFT to apply for AMLCD and AMOLED technology.