Haydar Bilhan

A programmable gain amplifier buffer design for video applications

A programmable gain amplifier (PGA) for video decoder application is presented: 16 linear gain steps from 1.35 to 5.4, 2.5 Vpp output swing, better than -55 dB THD (1 MHz, 2.5 Vpp) for 10 pF loading and 3 V power supply. The programmability is implemented by switching on/off resistors through a low distortion switching scheme. In this scheme, as the switches are symmetrically positioned at amplifier virtual ground, not only low distortion but also gain independent offset are achieved.

A 9b 165MS/s 1.8V pipelined ADC with all digital transistors amplifier

A 9 bit, 1.8 V, 165 MS/s pipelined ADC was built in a 0.21 /spl mu/m CMOS digital process. The inter-stage amplifier in this converter was built using all digital transistors. To get sufficient gain with digital transistors, a self-adjusting positive feedback operational amplifier, that shows low sensitivity to output swing, was used. The ADC consumed a total power of 90 mW when operated at full speed.