Heimo Uhrmann
Vienna University of Technology
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Featured researches published by Heimo Uhrmann.
design and diagnostics of electronic circuits and systems | 2009
Heimo Uhrmann; Franz Schlögl; Kurt Schweiger; Horst Zimmermann
The offer of information grows rapidly in mobile markets. The DVB-H standard as a part of DVB-T is an important carrier of information to a broad spectrum of consumers. New, cheap and robust receivers have to be developed, especially for handheld devices. We propose a high-speed operational amplifier for a low-pass filter in a direct conversion receiver. In order to integrate the receiver on a System on Chip, it is designed in 65nm low-power CMOS. The operational amplifier is a four-stage feed-forward nested Miller compensated fully differential operational amplifier with an AB output stage. A gain-bandwidth product of 1GHz and a gain of 58dB is reached. A load capacitance of 5pF can be driven at a phase margin of 62deg.
norchip | 2007
Heimo Uhrmann; Horst Zimmermann
A 3rd -order continuous-time current-mode filter in 65 nm CMOS technology with a switchable cut-off frequency between 1.1 MHz and 4.4 MHz for software defined radio on chip is presented. An innovative extension to a structure in literature is proposed, that allows to save chip area at low cut-off frequencies. The realized chip has an active area of 0.077 mm2 and consumes 12.3 mW at 1.2 V. The dynamic range for a bandwidth of 1.1 MHz is 77.2 dB, the in-band current noise is 31.16 pA/radicHz and the IIP3 is 1.8 mAp.
design and diagnostics of electronic circuits and systems | 2010
Heimo Uhrmann; Lukas Dörrer; Franz Kuttner; Kurt Schweiger; Horst Zimmermann
A mixer and operational amplifier filter combination in 65 nm CMOS technology for DVB-H is presented. Special focus is laid on the design of the operational amplifier, which is a nested-Miller compensated, 3-stage feed-forward operational amplifier. Characteristic of the operational amplifier is the supply voltage of 2.5 V to enlarge the output signal swing of the operational amplifier. Cascodes are used avoiding the electrical destruction. The operational amplifier has a gain of 89 dB, a gain-bandwidth of 1.1 GHz, and phase margin of 53.3 deg at a load of 1 pF on each of the two differential outputs. The current consumption is 5.85 mA. This operational amplifier is used in a first-order low-pass filter after a passive mixer. This mixer-filter combination is characterized as well. A conversion gain of 24 dB and a bandwidth of 4 MHz are realized. Furthermore a noise figure of 16.1 dB and an IIP3 of +10dBm are achieved.
design and diagnostics of electronic circuits and systems | 2009
Kurt Schweiger; Heimo Uhrmann; Horst Zimmermann
An innovative design with simulation results of a low-voltage bulk driven mixer for direct conversion receiver is presented. The circuit is designed in a 65nm digital CMOS process without analog extensions. It offers a conversion gain of 22dB at a clock frequency of 1.5GHz for GALILEO/GPS applications. The design is capable of operating at up to 7GHz with only 3dB gain decrease. The simulated noise figure is 27dB with a power consumption of 730µW. Simulations at a supply voltage of 0.9V instead of 1.2V show a gain decrease of only 3dB while the noise figure increases by 2dB.
Archive | 2014
Heimo Uhrmann; Robert Kolm; Horst Zimmermann
Voltage-mode filters and especially their linearity and dynamic range suffer from the low supply voltages of deep-sub-micron and nanometer CMOS. This fact served as motivation to investigate current-mode filters with the hope for a better linearity and larger dynamic range. Current-mode filters also may allow saving of current-to-voltage and voltage-to-current converters compared to the case when voltage mode filters are used in combination with current-mode mixer and current-steering digital-analog converter for instance. A lower power consumption then should be obtainable. This chapter will give on overview on current-mode filters described in literature and will introduce new current-mode filters designed in 120 nm CMOS and 65 nm low-power CMOS. Their properties are described in detail.
Archive | 2014
Heimo Uhrmann; Robert Kolm; Horst Zimmermann
This chapter describes operational transconductance amplifiers (OTAs) and their linearization for use in g m -C filters. Super-source-follower and digitally programmable OTAs are detailed. The common-mode feedback used in these OTAs and a buffer amplifier are described. A OTA implemented in 120 nm CMOS is introduced inclusive measured results.
Archive | 2014
Heimo Uhrmann; Robert Kolm; Horst Zimmermann
Several applications pose challenges for wireless receivers due to close blockers in the frequency spectrum. This requires amplifiers and filters with a high linearity. Due to the challenges of the nanometer hell of physics concerning design of operational amplifiers, new circuit architectures will be investigated. In fact, it will turn out that the low supply voltage of nanometer CMOS circuits is the most limiting factor to achieve a good linearity and a large dynamic range. A high-voltage operational amplifier finally will show the best performance in a filter-mixer combination. In addition, 1/f noise will turn out to reduce the choice of usable mixer topologies considerably.
Archive | 2014
Heimo Uhrmann; Robert Kolm; Horst Zimmermann
Analog filters are required in many mixed-signal systems. They can be used for anti-aliasing purposes, before signals are sampled in an A/D converter or they can be used for reconstructing the signal after a D/A converter. Also at the output of a mixer a filter which suppresses out-of-band interferer signals is necessary. In general, when a filter is designed it is necessary to consider the whole system in which the filter is embedded. Important parameters for filters are in-band and also out-of-band distortions. A high in-band linear dynamic range avoids intermodulation between two in-band signals. Out-of-band distortions are also essential because they describe the immunity against some blockers or disturbances to other channels in a multi-band system. Other important parameters are the noise spectral density or the integrated noise. For some applications the out-of-band spectral noise density should be under a certain level, otherwise the noise would interfere to a neighboring channel. Sometimes, when the same filter is used in the I-path and in the Q-path of a receiver, the mismatch between these two filters should not be too high. G m -C filter topologies, a figure of merit, the state-of-art, the requirements for UWB and three implemented filters are described in this chapter.
international symposium on system-on-chip | 2008
Heimo Uhrmann; Horst Zimmermann
A new capacitance saving method for differential current-mode filter structures is presented. Especially filters with low cut-off frequencies need large capacitors, which comes along with large and expensive chip area. We show the opportunity to save chip-area in a 3rd-order current-mode Butterworth low-pass filter and enlarge the effective capacitance value by 30%. The proposed filter is designed to be in a transmit path in a software defined radio of a mixed-signal system on chip. It is developed and fabricated in low-power 65 nm CMOS and needs an active area of 215 mum times 215 mum. The supply voltage is 1 V at a current consumption of 9.6 mA. The filter reaches a third-order input intercept point of 1.6 mAp and a dynamic range of 73.8 dB at a cut-off frequency of 1 MHz.
international conference mixed design of integrated circuits and systems | 2007
Heimo Uhrmann; Horst Zimmermann
In this paper we discuss the influence of deep-sub-micron CMOS technology on analog circuit design with a special focus on the noise performance and the ability to design low-noise preamplifiers. To point out, why CMOS technology can grow to a key technology in low-noise and high-speed applications, various amplifier stages applied in literature are compared. One, that fits as a current preamplifier for low-noise applications, is the current mirror. Starting from the basic current mirror, an enhanced current preamplifier is developed, that offers low-noise and high-speed operation. The suggested chip is realized in 0.12mum CMOS technology and needs a chip area of 100mum x 280mum. It consumes about l2.1mW at a supply voltage of 1.5V. The presented current preamplifier has a bandwidth of 800MHz and a gain of 44dB. The fields of application for current preamplifiers are, for instance, charge amplifiers, amplifiers for low-voltage differential signaling (LVDS) based point-to-point data links or preamplifiers for photodetectors.